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authorClifford Wolf <clifford@clifford.at>2018-06-18 14:15:41 +0200
committerClifford Wolf <clifford@clifford.at>2018-06-18 14:15:41 +0200
commitf30d477c8129c3c189866a4bc862724d4e8d4398 (patch)
tree552fe4a537e6776ce9fbc360ceb9e5d62677385c /common/design_utils.cc
parent2f5e9542c2d9132b2c01d4dbc8c4d2dff97c60cf (diff)
parentcbcd2ea3acaf257bf39b25a38d9f591e82a66f37 (diff)
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Merge branch 'refactor'
Diffstat (limited to 'common/design_utils.cc')
-rw-r--r--common/design_utils.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/common/design_utils.cc b/common/design_utils.cc
index ae6e21ed..f2ce2285 100644
--- a/common/design_utils.cc
+++ b/common/design_utils.cc
@@ -53,16 +53,16 @@ void replace_port(CellInfo *old_cell, IdString old_name, CellInfo *rep_cell,
}
// Print utilisation of a design
-void print_utilisation(const Design *design)
+void print_utilisation(const Context *ctx)
{
// Sort by Bel type
std::map<BelType, int> used_types;
- for (auto cell : design->cells) {
+ for (auto cell : ctx->cells) {
used_types[belTypeFromId(cell.second->type)]++;
}
std::map<BelType, int> available_types;
- for (auto bel : design->chip.getBels()) {
- available_types[design->chip.getBelType(bel)]++;
+ for (auto bel : ctx->getBels()) {
+ available_types[ctx->getBelType(bel)]++;
}
log("\nDesign utilisation:\n");
for (auto type : available_types) {