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| author | gatecat <gatecat@ds0.me> | 2021-12-19 16:41:34 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-12-19 17:15:15 +0000 |
| commit | ddb084e9a8a0cba10536951236cde824526e8071 (patch) | |
| tree | d03ba5688367cb476a06b19d04ca78d0352afce3 /common/timing_opt.cc | |
| parent | 56d550733346000584b9490fac0953fe07124035 (diff) | |
| download | nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.gz nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.bz2 nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.zip | |
archapi: Use arbitrary rather than actual placement in predictDelay
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.
A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'common/timing_opt.cc')
| -rw-r--r-- | common/timing_opt.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/common/timing_opt.cc b/common/timing_opt.cc index 6dd93d67..a73a70cf 100644 --- a/common/timing_opt.cc +++ b/common/timing_opt.cc @@ -99,7 +99,7 @@ class TimingOptimiser continue; for (auto user : net->users) { if (user.cell == cell && user.port == port.first) { - if (ctx->predictDelay(net, user) > + if (ctx->predictArcDelay(net, user) > 1.1 * max_net_delay.at(std::make_pair(cell->name, port.first))) return false; } @@ -111,7 +111,7 @@ class TimingOptimiser BelId dstBel = user.cell->bel; if (dstBel == BelId()) continue; - if (ctx->predictDelay(net, user) > + if (ctx->predictArcDelay(net, user) > 1.1 * max_net_delay.at(std::make_pair(user.cell->name, user.port))) { return false; @@ -413,7 +413,7 @@ class TimingOptimiser for (size_t j = 0; j < pn->users.size(); j++) { auto &usr = pn->users.at(j); if (usr.cell == path.at(i)->cell && usr.port == path.at(i)->port) { - original_delay += ctx->predictDelay(pn, usr); + original_delay += ctx->predictArcDelay(pn, usr); break; } } @@ -497,7 +497,7 @@ class TimingOptimiser for (size_t j = 0; j < pn->users.size(); j++) { auto &usr = pn->users.at(j); if (usr.cell == path.at(i)->cell && usr.port == path.at(i)->port) { - total_delay += ctx->predictDelay(pn, usr); + total_delay += ctx->predictArcDelay(pn, usr); break; } } |