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authorDavid Shah <dave@ds0.me>2018-12-14 13:06:00 +0000
committerDavid Shah <davey1576@gmail.com>2019-02-05 08:20:05 +0100
commit564a7e27b125302101c76f5b347880df0381a5ad (patch)
tree26ef7189b875729c4a13fea4755573b3326d9360 /common
parent6d664046d3774c8fa2a9dccb64dd8ab06cc0cd0a (diff)
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timing: Add --ignore-loops option
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'common')
-rw-r--r--common/command.cc6
-rw-r--r--common/timing.cc2
2 files changed, 7 insertions, 1 deletions
diff --git a/common/command.cc b/common/command.cc
index 6ba3442f..8f18f54d 100644
--- a/common/command.cc
+++ b/common/command.cc
@@ -124,6 +124,8 @@ po::options_description CommandHandler::getGeneralOptions()
general.add_options()("cstrweight", po::value<float>(), "placer weighting for relative constraint satisfaction");
general.add_options()("pack-only", "pack design only without placement or routing");
+ general.add_options()("ignore-loops", "ignore combinational loops in timing analysis");
+
general.add_options()("version,V", "show version");
general.add_options()("test", "check architecture database integrity");
general.add_options()("freq", po::value<double>(), "set target frequency for design in MHz");
@@ -172,6 +174,10 @@ void CommandHandler::setupContext(Context *ctx)
}
}
+ if (vm.count("ignore-loops")) {
+ settings->set("timing/ignoreLoops", true);
+ }
+
if (vm.count("cstrweight")) {
settings->set("placer1/constraintWeight", vm["cstrweight"].as<float>());
}
diff --git a/common/timing.cc b/common/timing.cc
index f3cb4306..13f0e07b 100644
--- a/common/timing.cc
+++ b/common/timing.cc
@@ -225,7 +225,7 @@ struct Timing
}
// Sanity check to ensure that all ports where fanins were recorded were indeed visited
- if (!port_fanin.empty()) {
+ if (!port_fanin.empty() && !bool_or_default(ctx->settings, ctx->id("timing/ignoreLoops"), false)) {
for (auto fanin : port_fanin) {
NetInfo *net = fanin.first->net;
if (net != nullptr) {