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| author | ZipCPU <dgisselq@ieee.org> | 2018-06-05 09:01:26 -0400 |
|---|---|---|
| committer | ZipCPU <dgisselq@ieee.org> | 2018-06-05 09:01:26 -0400 |
| commit | 709ce3884de2778f8ec7767a56530008922913b3 (patch) | |
| tree | 74aaa1bdd344d1eeee5cef26f2a6736b9b7b6853 /common | |
| parent | 3b78eda5d3d26af04ad87e5d08b3ee6da852b71a (diff) | |
| download | nextpnr-709ce3884de2778f8ec7767a56530008922913b3.tar.gz nextpnr-709ce3884de2778f8ec7767a56530008922913b3.tar.bz2 nextpnr-709ce3884de2778f8ec7767a56530008922913b3.zip | |
Initial JSON parser
Diffstat (limited to 'common')
| -rw-r--r-- | common/design.h | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/common/design.h b/common/design.h index f87a5081..3e4091c3 100644 --- a/common/design.h +++ b/common/design.h @@ -36,11 +36,15 @@ using std::vector; struct GraphicElement { - // This will control colour, and there should be separate visibility controls in some cases also + // This will control colour, and there should be separate + // visibility controls in some cases also enum { - G_LOCAL_WIRES, // Wires entirely inside tiles, e.g. between switchbox and bels - G_GENERAL_WIRES, // Standard inter-tile routing - G_DEDICATED_WIRES, // Special inter-tile wires, e.g. carry chains + // Wires entirely inside tiles, e.g. between switchbox and bels + G_LOCAL_WIRES, + // Standard inter-tile routing + G_GENERAL_WIRES, + // Special inter-tile wires, e.g. carry chains + G_DEDICATED_WIRES, G_BEL_OUTLINE, G_SWITCHBOX_OUTLINE, G_TILE_OUTLINE, @@ -73,13 +77,13 @@ struct PortRef struct NetInfo { - IdString name; - PortRef driver; - vector<PortRef> users; - dict<IdString, std::string> attrs; + IdString name; + PortRef driver; + vector<PortRef> users; + dict<IdString, std::string> attrs; // wire -> (uphill_wire, delay) - dict<WireId, std::pair<WireId, DelayInfo>> wires; + dict<WireId, std::pair<WireId, DelayInfo>> wires; }; enum PortType @@ -98,9 +102,9 @@ struct PortInfo struct CellInfo { - IdString name, type; - dict<IdString, PortInfo> ports; - dict<IdString, std::string> attrs, params; + IdString name, type; + dict<IdString, PortInfo> ports; + dict<IdString, std::string> attrs, params; BelId bel; // cell_port -> bel_pin |