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| author | gatecat <gatecat@ds0.me> | 2021-02-15 09:38:22 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-02-15 09:38:22 +0000 |
| commit | 1b6cdce9251d42236a3db0314e84d6a3e3f06408 (patch) | |
| tree | be3b382420edd6cb1f1b6203f7ac518c7aeb4a4f /docs | |
| parent | f1ccc0e20531f63355e3da7c6c5f4f39a684fa3f (diff) | |
| parent | 7c7d69e1d2030dc983d0ddbc0e04f6765d51bbbc (diff) | |
| download | nextpnr-1b6cdce9251d42236a3db0314e84d6a3e3f06408.tar.gz nextpnr-1b6cdce9251d42236a3db0314e84d6a3e3f06408.tar.bz2 nextpnr-1b6cdce9251d42236a3db0314e84d6a3e3f06408.zip | |
Merge pull request #575 from YosysHQ/gatecat/belpin-2
Support for cell pin to bel pin mappings
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/archapi.md | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/docs/archapi.md b/docs/archapi.md index df7cd0a1..0f0e6181 100644 --- a/docs/archapi.md +++ b/docs/archapi.md @@ -13,6 +13,7 @@ The contents of `ArchRanges` is as follows: |`TileBelsRangeT` | `BelId` | |`BelAttrsRangeT` | std::pair<IdString, std::string> | |`BelPinsRangeT` | `IdString` | +|`CellBelPinRangeT` | `IdString` | |`AllWiresRangeT` | `WireId` | |`DownhillPipRangeT` | `PipId` | |`UphillPipRangeT` | `PipId` | @@ -250,6 +251,12 @@ Return the type (input/output/inout) of the given bel pin. Return a list of all pins on that bel. +### CellBelPinRangeT getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const + +Return the list of bel pin names that a given cell pin should be routed to. In most cases there will be a single bel pin for each cell pin; and output pins must _always_ have only one bel pin associated with them. + +*BaseArch default: returns a one-element array containing `pin`* + Wire Methods ------------ |