Merge branch 'refactor'

7 files changed, 190 insertions, 198 deletions

diff --git a/dummy/arch.cc b/dummy/arch.cc
new file mode 100644
index 00000000..5bbf36e3
--- /dev/null
+++ b/dummy/arch.cc
@@ -0,0 +1,179 @@
+/*
+ *  nextpnr -- Next Generation Place and Route
+ *
+ *  Copyright (C) 2018  Clifford Wolf <clifford@clifford.at>
+ *
+ *  Permission to use, copy, modify, and/or distribute this software for any
+ *  purpose with or without fee is hereby granted, provided that the above
+ *  copyright notice and this permission notice appear in all copies.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <math.h>
+#include "nextpnr.h"
+
+NEXTPNR_NAMESPACE_BEGIN
+
+Arch::Arch(ArchArgs) {}
+
+std::string Arch::getChipName() { return "Dummy"; }
+
+void IdString::initialize_chip() {}
+
+// ---------------------------------------------------------------
+
+BelId Arch::getBelByName(IdString name) const { return BelId(); }
+
+IdString Arch::getBelName(BelId bel) const { return IdString(); }
+
+void Arch::bindBel(BelId bel, IdString cell) {}
+
+void Arch::unbindBel(BelId bel) {}
+
+bool Arch::checkBelAvail(BelId bel) const { return false; }
+
+IdString Arch::getBelCell(BelId bel, bool conflicting) const
+{
+    return IdString();
+}
+
+const std::vector<BelId> &Arch::getBels() const
+{
+    static std::vector<BelId> ret;
+    return ret;
+}
+
+const std::vector<BelId> &Arch::getBelsByType(BelType type) const
+{
+    static std::vector<BelId> ret;
+    return ret;
+}
+
+BelType Arch::getBelType(BelId bel) const { return BelType(); }
+
+WireId Arch::getWireBelPin(BelId bel, PortPin pin) const { return WireId(); }
+
+BelPin Arch::getBelPinUphill(WireId wire) const { return BelPin(); }
+
+const std::vector<BelPin> &Arch::getBelPinsDownhill(WireId wire) const
+{
+    static std::vector<BelPin> ret;
+    return ret;
+}
+
+// ---------------------------------------------------------------
+
+WireId Arch::getWireByName(IdString name) const { return WireId(); }
+
+IdString Arch::getWireName(WireId wire) const { return IdString(); }
+
+void Arch::bindWire(WireId wire, IdString net) {}
+
+void Arch::unbindWire(WireId wire) {}
+
+bool Arch::checkWireAvail(WireId wire) const { return false; }
+
+IdString Arch::getWireNet(WireId wire, bool conflicting) const
+{
+    return IdString();
+}
+
+const std::vector<WireId> &Arch::getWires() const
+{
+    static std::vector<WireId> ret;
+    return ret;
+}
+
+// ---------------------------------------------------------------
+
+PipId Arch::getPipByName(IdString name) const { return PipId(); }
+
+IdString Arch::getPipName(PipId pip) const { return IdString(); }
+
+void Arch::bindPip(PipId pip, IdString net) {}
+
+void Arch::unbindPip(PipId pip) {}
+
+bool Arch::checkPipAvail(PipId pip) const { return false; }
+
+IdString Arch::getPipNet(PipId pip, bool conflicting) const
+{
+    return IdString();
+}
+
+const std::vector<PipId> &Arch::getPips() const
+{
+    static std::vector<PipId> ret;
+    return ret;
+}
+
+WireId Arch::getPipSrcWire(PipId pip) const { return WireId(); }
+
+WireId Arch::getPipDstWire(PipId pip) const { return WireId(); }
+
+DelayInfo Arch::getPipDelay(PipId pip) const { return DelayInfo(); }
+
+const std::vector<PipId> &Arch::getPipsDownhill(WireId wire) const
+{
+    static std::vector<PipId> ret;
+    return ret;
+}
+
+const std::vector<PipId> &Arch::getPipsUphill(WireId wire) const
+{
+    static std::vector<PipId> ret;
+    return ret;
+}
+
+const std::vector<PipId> &Arch::getWireAliases(WireId wire) const
+{
+    static std::vector<PipId> ret;
+    return ret;
+}
+
+// ---------------------------------------------------------------
+
+bool Arch::estimatePosition(BelId bel, int &x, int &y) const
+{
+    x = 0.0;
+    y = 0.0;
+    return false;
+}
+
+delay_t Arch::estimateDelay(WireId src, WireId dst) const { return 0.0; }
+
+// ---------------------------------------------------------------
+
+std::vector<GraphicElement> Arch::getFrameGraphics() const
+{
+    static std::vector<GraphicElement> ret;
+    return ret;
+}
+
+std::vector<GraphicElement> Arch::getBelGraphics(BelId bel) const
+{
+    static std::vector<GraphicElement> ret;
+    return ret;
+}
+
+std::vector<GraphicElement> Arch::getWireGraphics(WireId wire) const
+{
+    static std::vector<GraphicElement> ret;
+    return ret;
+}
+
+std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const
+{
+    static std::vector<GraphicElement> ret;
+    return ret;
+}
+
+NEXTPNR_NAMESPACE_END
diff --git a/dummy/chip.h b/dummy/arch.h
index 03e16e64..40aceff2 100644
--- a/dummy/chip.h
+++ b/dummy/arch.h
@@ -21,7 +21,7 @@
 #define CHIP_H
 
 #ifndef NEXTPNR_H
-#error Include "chip.h" via "nextpnr.h" only.
+#error Include "arch.h" via "nextpnr.h" only.
 #endif
 
 NEXTPNR_NAMESPACE_BEGIN
@@ -63,15 +63,13 @@ struct BelPin
     PortPin pin;
 };
 
-struct ChipArgs
+struct ArchArgs
 {
 };
 
-std::string getChipName(ChipArgs id);
-
-struct Chip
+struct Arch
 {
-    Chip(ChipArgs args);
+    Arch(ArchArgs args);
 
     std::string getChipName();
 
diff --git a/dummy/arch_place.cc b/dummy/arch_place.cc
index 07ff53ae..4e712f6d 100644
--- a/dummy/arch_place.cc
+++ b/dummy/arch_place.cc
@@ -21,14 +21,8 @@
 
 NEXTPNR_NAMESPACE_BEGIN
 
-bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel)
-{
-    return true;
-}
+bool isValidBelForCell(Context *ctx, CellInfo *cell, BelId bel) { return true; }
 
-bool isBelLocationValid(Design *design, BelId bel)
-{
-    return true;
-}
+bool isBelLocationValid(Context *ctx, BelId bel) { return true; }
 
 NEXTPNR_NAMESPACE_END
diff --git a/dummy/arch_place.h b/dummy/arch_place.h
index 1e14ec68..3abd80c5 100644
--- a/dummy/arch_place.h
+++ b/dummy/arch_place.h
@@ -29,10 +29,10 @@ NEXTPNR_NAMESPACE_BEGIN
 // Whether or not a given cell can be placed at a given Bel
 // This is not intended for Bel type checks, but finer-grained constraints
 // such as conflicting set/reset signals, etc
-bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel);
+bool isValidBelForCell(Context *ctx, CellInfo *cell, BelId bel);
 
 // Return true whether all Bels at a given location are valid
-bool isBelLocationValid(Design *design, BelId bel);
+bool isBelLocationValid(Context *ctx, BelId bel);
 
 NEXTPNR_NAMESPACE_END
 
diff --git a/dummy/chip.cc b/dummy/chip.cc
deleted file mode 100644
index 965517fe..00000000
--- a/dummy/chip.cc
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- *  nextpnr -- Next Generation Place and Route
- *
- *  Copyright (C) 2018  Clifford Wolf <clifford@clifford.at>
- *
- *  Permission to use, copy, modify, and/or distribute this software for any
- *  purpose with or without fee is hereby granted, provided that the above
- *  copyright notice and this permission notice appear in all copies.
- *
- *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- *
- */
-
-#include <math.h>
-#include "nextpnr.h"
-
-NEXTPNR_NAMESPACE_BEGIN
-
-Chip::Chip(ChipArgs) {}
-
-std::string Chip::getChipName() { return "Dummy"; }
-
-void IdString::initialize_chip() {}
-
-// ---------------------------------------------------------------
-
-BelId Chip::getBelByName(IdString name) const { return BelId(); }
-
-IdString Chip::getBelName(BelId bel) const { return IdString(); }
-
-void Chip::bindBel(BelId bel, IdString cell) {}
-
-void Chip::unbindBel(BelId bel) {}
-
-bool Chip::checkBelAvail(BelId bel) const { return false; }
-
-IdString Chip::getBelCell(BelId bel, bool conflicting) const
-{
-    return IdString();
-}
-
-const std::vector<BelId> &Chip::getBels() const
-{
-    static std::vector<BelId> ret;
-    return ret;
-}
-
-const std::vector<BelId> &Chip::getBelsByType(BelType type) const
-{
-    static std::vector<BelId> ret;
-    return ret;
-}
-
-BelType Chip::getBelType(BelId bel) const { return BelType(); }
-
-WireId Chip::getWireBelPin(BelId bel, PortPin pin) const { return WireId(); }
-
-BelPin Chip::getBelPinUphill(WireId wire) const { return BelPin(); }
-
-const std::vector<BelPin> &Chip::getBelPinsDownhill(WireId wire) const
-{
-    static std::vector<BelPin> ret;
-    return ret;
-}
-
-// ---------------------------------------------------------------
-
-WireId Chip::getWireByName(IdString name) const { return WireId(); }
-
-IdString Chip::getWireName(WireId wire) const { return IdString(); }
-
-void Chip::bindWire(WireId wire, IdString net) {}
-
-void Chip::unbindWire(WireId wire) {}
-
-bool Chip::checkWireAvail(WireId wire) const { return false; }
-
-IdString Chip::getWireNet(WireId wire, bool conflicting) const
-{
-    return IdString();
-}
-
-const std::vector<WireId> &Chip::getWires() const
-{
-    static std::vector<WireId> ret;
-    return ret;
-}
-
-// ---------------------------------------------------------------
-
-PipId Chip::getPipByName(IdString name) const { return PipId(); }
-
-IdString Chip::getPipName(PipId pip) const { return IdString(); }
-
-void Chip::bindPip(PipId pip, IdString net) {}
-
-void Chip::unbindPip(PipId pip) {}
-
-bool Chip::checkPipAvail(PipId pip) const { return false; }
-
-IdString Chip::getPipNet(PipId pip, bool conflicting) const
-{
-    return IdString();
-}
-
-const std::vector<PipId> &Chip::getPips() const
-{
-    static std::vector<PipId> ret;
-    return ret;
-}
-
-WireId Chip::getPipSrcWire(PipId pip) const { return WireId(); }
-
-WireId Chip::getPipDstWire(PipId pip) const { return WireId(); }
-
-DelayInfo Chip::getPipDelay(PipId pip) const { return DelayInfo(); }
-
-const std::vector<PipId> &Chip::getPipsDownhill(WireId wire) const
-{
-    static std::vector<PipId> ret;
-    return ret;
-}
-
-const std::vector<PipId> &Chip::getPipsUphill(WireId wire) const
-{
-    static std::vector<PipId> ret;
-    return ret;
-}
-
-const std::vector<PipId> &Chip::getWireAliases(WireId wire) const
-{
-    static std::vector<PipId> ret;
-    return ret;
-}
-
-// ---------------------------------------------------------------
-
-bool Chip::estimatePosition(BelId bel, int &x, int &y) const
-{
-    x = 0.0;
-    y = 0.0;
-    return false;
-}
-
-delay_t Chip::estimateDelay(WireId src, WireId dst) const { return 0.0; }
-
-// ---------------------------------------------------------------
-
-std::vector<GraphicElement> Chip::getFrameGraphics() const
-{
-    static std::vector<GraphicElement> ret;
-    return ret;
-}
-
-std::vector<GraphicElement> Chip::getBelGraphics(BelId bel) const
-{
-    static std::vector<GraphicElement> ret;
-    return ret;
-}
-
-std::vector<GraphicElement> Chip::getWireGraphics(WireId wire) const
-{
-    static std::vector<GraphicElement> ret;
-    return ret;
-}
-
-std::vector<GraphicElement> Chip::getPipGraphics(PipId pip) const
-{
-    static std::vector<GraphicElement> ret;
-    return ret;
-}
-
-NEXTPNR_NAMESPACE_END
diff --git a/dummy/main.cc b/dummy/main.cc
index 7aa2f08f..6375eef9 100644
--- a/dummy/main.cc
+++ b/dummy/main.cc
@@ -27,10 +27,10 @@ USING_NEXTPNR_NAMESPACE
 
 int main(int argc, char *argv[])
 {
-    Design design(ChipArgs{});
+    Context ctx(ArchArgs{});
 
     QApplication a(argc, argv);
-    MainWindow w(&design);
+    MainWindow w(&ctx);
     w.show();
 
     return a.exec();
diff --git a/dummy/pybindings.cc b/dummy/pybindings.cc
index ec0e20b2..87716267 100644
--- a/dummy/pybindings.cc
+++ b/dummy/pybindings.cc
@@ -23,6 +23,6 @@
 
 NEXTPNR_NAMESPACE_BEGIN
 
-void arch_wrap_python() { class_<ChipArgs>("ChipArgs"); }
+void arch_wrap_python() { class_<ArchArgs>("ArchArgs"); }
 
 NEXTPNR_NAMESPACE_END