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| author | David Shah <dave@ds0.me> | 2020-04-07 20:02:29 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-07 20:02:29 +0100 |
| commit | 396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf (patch) | |
| tree | 2886c786853565c048274fd13b0d1b55c6510c14 /ecp5/arch.cc | |
| parent | e8933f8519768447874167dcb62a6cd2b24a0225 (diff) | |
| parent | 3aecb3b08c20c3dc5055bce035bd2667705ea5b2 (diff) | |
| download | nextpnr-396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf.tar.gz nextpnr-396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf.tar.bz2 nextpnr-396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf.zip | |
Merge pull request #423 from rschlaikjer/rschlaikjer-regmode-timing-database
Add support for REGMODE to DP16KD
Diffstat (limited to 'ecp5/arch.cc')
| -rw-r--r-- | ecp5/arch.cc | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/ecp5/arch.cc b/ecp5/arch.cc index 3aed3ad4..ab24842e 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -1077,12 +1077,10 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port ? FALLING_EDGE : RISING_EDGE; if (cell->ports.at(port).type == PORT_OUT) { - bool is_path = getDelayFromTimingDatabase(id_DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG, half_clock, port, - info.clockToQ); + bool is_path = getDelayFromTimingDatabase(cell->ramInfo.regmode_timing_id, half_clock, port, info.clockToQ); NPNR_ASSERT(is_path); } else { - getSetupHoldFromTimingDatabase(id_DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG, half_clock, port, info.setup, - info.hold); + getSetupHoldFromTimingDatabase(cell->ramInfo.regmode_timing_id, half_clock, port, info.setup, info.hold); } } else if (cell->type == id_DCUA) { std::string prefix = port.str(this).substr(0, 9); |