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| author | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-02-15 09:45:52 -0800 |
|---|---|---|
| committer | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-02-16 09:37:19 -0800 |
| commit | bb4fa7af5b17c9896ee2499cb13e7ca18f424220 (patch) | |
| tree | 51bcdec5018d1cb407f0b884348de51795b719b3 /ecp5/globals.cc | |
| parent | a74d1a8b328252c2c07e7af7b9e9bb0e5f251bb5 (diff) | |
| download | nextpnr-bb4fa7af5b17c9896ee2499cb13e7ca18f424220.tar.gz nextpnr-bb4fa7af5b17c9896ee2499cb13e7ca18f424220.tar.bz2 nextpnr-bb4fa7af5b17c9896ee2499cb13e7ca18f424220.zip | |
[FPGA Interchange] Add Cell -> BEL Pin maps.
This also expands the FPGA interchange Arch BBA to include placement
constraints, but doesn't implement them yet.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to 'ecp5/globals.cc')
0 files changed, 0 insertions, 0 deletions