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| author | Ross Schlaikjer <ross@schlaikjer.net> | 2020-04-07 14:44:19 -0400 |
|---|---|---|
| committer | Ross Schlaikjer <ross@schlaikjer.net> | 2020-04-07 14:44:19 -0400 |
| commit | 3aecb3b08c20c3dc5055bce035bd2667705ea5b2 (patch) | |
| tree | d6c0da52fc98cb0561a47248508811d0ae71f3b0 /ecp5/pack.cc | |
| parent | fc591421f970b8bb43c911adbfefccdd00d81b9c (diff) | |
| download | nextpnr-3aecb3b08c20c3dc5055bce035bd2667705ea5b2.tar.gz nextpnr-3aecb3b08c20c3dc5055bce035bd2667705ea5b2.tar.bz2 nextpnr-3aecb3b08c20c3dc5055bce035bd2667705ea5b2.zip | |
No need to fetch context
Diffstat (limited to 'ecp5/pack.cc')
| -rw-r--r-- | ecp5/pack.cc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/ecp5/pack.cc b/ecp5/pack.cc index eea05c83..dac889ce 100644 --- a/ecp5/pack.cc +++ b/ecp5/pack.cc @@ -2972,7 +2972,6 @@ bool Arch::pack() void Arch::assignArchInfo() { - Context *ctx = getCtx(); for (auto cell : sorted(cells)) { CellInfo *ci = cell.second; if (ci->type == id_TRELLIS_SLICE) { @@ -3009,11 +3008,11 @@ void Arch::assignArchInfo() // Output register mode (REGMODE_{A,B}). Valid options are 'NOREG' and 'OUTREG'. std::string regmode_a = str_or_default(ci->params, id("REGMODE_A"), "NOREG"); if (regmode_a != "NOREG" && regmode_a != "OUTREG") - log_error("DP16KD %s has invalid REGMODE_A configuration '%s'\n", ci->name.c_str(ctx), + log_error("DP16KD %s has invalid REGMODE_A configuration '%s'\n", ci->name.c_str(this), regmode_a.c_str()); std::string regmode_b = str_or_default(ci->params, id("REGMODE_B"), "NOREG"); if (regmode_b != "NOREG" && regmode_b != "OUTREG") - log_error("DP16KD %s has invalid REGMODE_B configuration '%s'\n", ci->name.c_str(ctx), + log_error("DP16KD %s has invalid REGMODE_B configuration '%s'\n", ci->name.c_str(this), regmode_b.c_str()); ci->ramInfo.is_output_a_registered = regmode_a == "OUTREG"; ci->ramInfo.is_output_b_registered = regmode_b == "OUTREG"; |