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| author | David Shah <davey1576@gmail.com> | 2018-07-08 14:24:32 +0200 |
|---|---|---|
| committer | David Shah <davey1576@gmail.com> | 2018-07-11 10:42:09 +0200 |
| commit | 981522b10ead3b3c2cbc5f9f270b9fae9320395b (patch) | |
| tree | 671e464cc927f421fc3e42d40726779e46c2e3c0 /ecp5/synth | |
| parent | 417913fd8509a44edf8421184c46d15d6763908b (diff) | |
| download | nextpnr-981522b10ead3b3c2cbc5f9f270b9fae9320395b.tar.gz nextpnr-981522b10ead3b3c2cbc5f9f270b9fae9320395b.tar.bz2 nextpnr-981522b10ead3b3c2cbc5f9f270b9fae9320395b.zip | |
ecp5: Blinky example places and routes
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ecp5/synth')
| -rw-r--r-- | ecp5/synth/wire.v | 11 | ||||
| -rw-r--r-- | ecp5/synth/wire.ys | 9 |
2 files changed, 20 insertions, 0 deletions
diff --git a/ecp5/synth/wire.v b/ecp5/synth/wire.v new file mode 100644 index 00000000..2af68ed2 --- /dev/null +++ b/ecp5/synth/wire.v @@ -0,0 +1,11 @@ +module top(input a_pin, output [3:0] led_pin); + + wire a; + wire [3:0] led; + + TRELLIS_IO #(.DIR("INPUT")) a_buf (.B(a_pin), .O(a)); + TRELLIS_IO #(.DIR("OUTPUT")) led_buf [3:0] (.B(led_pin), .I(led)); + + //assign led[0] = !a; + always @(posedge a) led[0] <= !led[0]; +endmodule diff --git a/ecp5/synth/wire.ys b/ecp5/synth/wire.ys new file mode 100644 index 00000000..f916588b --- /dev/null +++ b/ecp5/synth/wire.ys @@ -0,0 +1,9 @@ +read_verilog wire.v +read_verilog -lib cells.v +synth -top top +abc -lut 4 +techmap -map simple_map.v +splitnets +opt_clean +stat +write_json wire.json |