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| author | gatecat <gatecat@ds0.me> | 2021-02-19 10:39:57 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-02-19 11:31:33 +0000 |
| commit | 7922b3bfc4ef93b8f67194c05e1a236b4c83c3da (patch) | |
| tree | b2b21259e030edd0adc7cc944322e3e9186d3a71 /fpga_interchange/arch.cc | |
| parent | 8376db94a7519406444988be3628a4dadfb8d742 (diff) | |
| download | nextpnr-7922b3bfc4ef93b8f67194c05e1a236b4c83c3da.tar.gz nextpnr-7922b3bfc4ef93b8f67194c05e1a236b4c83c3da.tar.bz2 nextpnr-7922b3bfc4ef93b8f67194c05e1a236b4c83c3da.zip | |
Replace DelayInfo with DelayPair/DelayQuad
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.
This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.
While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange/arch.cc')
| -rw-r--r-- | fpga_interchange/arch.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 71ba46e4..9bcd7f79 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -686,7 +686,7 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const return 0; } -bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const +bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayQuad &delay) const { // FIXME: Implement when adding timing-driven place and route. return false; |