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| author | gatecat <gatecat@ds0.me> | 2022-03-04 18:17:08 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-04 18:17:08 +0000 |
| commit | 285325ad5bf60b5230789b9e64b4dc76a406c04d (patch) | |
| tree | 4b65cf1e01ca5657bc2625ad252292648d67f64f /fpga_interchange/arch.h | |
| parent | 2c8062bdb396682a558ecbdc574620e4121b7faf (diff) | |
| parent | b5d6fc8ed7bc446b1d810c82029e7b327bea5049 (diff) | |
| download | nextpnr-285325ad5bf60b5230789b9e64b4dc76a406c04d.tar.gz nextpnr-285325ad5bf60b5230789b9e64b4dc76a406c04d.tar.bz2 nextpnr-285325ad5bf60b5230789b9e64b4dc76a406c04d.zip | |
Merge pull request #932 from antmicro/remove-hardcoded-values-from-lut-mapping-cache
interchange: lut map cache: remove hardcoded values
Diffstat (limited to 'fpga_interchange/arch.h')
| -rw-r--r-- | fpga_interchange/arch.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 8bb2e2d1..78877452 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1134,6 +1134,11 @@ struct Arch : ArchAPI<ArchRanges> IdString vcc_cell_pin; std::vector<std::vector<LutElement>> lut_elements; dict<IdString, const LutCellPOD *> lut_cells; + + // Defines the max number of LUT cells in a site and LUT pins + // to allow a correct functioning of the site lut mapping cache + int max_lut_cells; + int max_lut_pins; // Of the LUT cells, which is used for wires? // Note: May be null in arch's without wire LUT types. Assumption is |