diff options
author | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-02-23 13:35:45 -0800 |
---|---|---|
committer | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-02-23 14:09:28 -0800 |
commit | a30043c8da1b1cc46a2dcfb90aa3a06d4f4ed4e9 (patch) | |
tree | 7d9558216c7b9858bd31323ff3482b50e9d5c05f /fpga_interchange/arch_pack_io.cc | |
parent | 184665652eaf351bf9337b524c5d82a50ce54041 (diff) | |
download | nextpnr-a30043c8da1b1cc46a2dcfb90aa3a06d4f4ed4e9.tar.gz nextpnr-a30043c8da1b1cc46a2dcfb90aa3a06d4f4ed4e9.tar.bz2 nextpnr-a30043c8da1b1cc46a2dcfb90aa3a06d4f4ed4e9.zip |
Fix assorted bugs in FPGA interchange.
Fixes:
- Only use map constant pins during routing, and not during placement.
- Unmapped cell ports have no BEL pins.
- Fix SiteRouter congestion not taking into account initial expansion.
- Fix psuedo-site pip output.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to 'fpga_interchange/arch_pack_io.cc')
-rw-r--r-- | fpga_interchange/arch_pack_io.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/fpga_interchange/arch_pack_io.cc b/fpga_interchange/arch_pack_io.cc index 6a0ffe0b..06cfa002 100644 --- a/fpga_interchange/arch_pack_io.cc +++ b/fpga_interchange/arch_pack_io.cc @@ -243,7 +243,9 @@ void Arch::pack_ports() for (CellInfo *cell : placed_cells) { NPNR_ASSERT(cell->bel != BelId()); - NPNR_ASSERT(isBelLocationValid(cell->bel)); + if (!isBelLocationValid(cell->bel)) { + log_error("Tightly bound BEL %s was not valid!\n", nameOfBel(cell->bel)); + } } } } |