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authorgatecat <gatecat@ds0.me>2021-06-02 10:01:36 +0100
committergatecat <gatecat@ds0.me>2021-06-02 15:05:19 +0100
commitecc19c2c083f7e3ed7da95557731ded803d2cb1d (patch)
tree864780d38cb9a49b6846a0045ac93e1b4dfcc88d /fpga_interchange/cell_parameters.h
parentf4fed62c05a9595e22a8ec54add5531225911741 (diff)
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Using hashlib in arches
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange/cell_parameters.h')
-rw-r--r--fpga_interchange/cell_parameters.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/fpga_interchange/cell_parameters.h b/fpga_interchange/cell_parameters.h
index de82e76b..d6d4ccec 100644
--- a/fpga_interchange/cell_parameters.h
+++ b/fpga_interchange/cell_parameters.h
@@ -25,7 +25,6 @@
#include "chipdb.h"
#include "dynamic_bitarray.h"
-#include "hash_table.h"
#include "nextpnr_namespaces.h"
#include "property.h"
@@ -42,7 +41,7 @@ struct CellParameters
bool compare_property(const Context *ctx, IdString cell_type, IdString parameter, const Property &property,
IdString value_to_compare) const;
- HashTables::HashMap<std::pair<IdString, IdString>, const CellParameterPOD *, PairHash> parameters;
+ dict<std::pair<IdString, IdString>, const CellParameterPOD *> parameters;
std::regex verilog_binary_re;
std::regex verilog_hex_re;