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author | Maciej Dudek <mdudek@antmicro.com> | 2021-09-20 13:51:08 +0200 |
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committer | Maciej Dudek <mdudek@antmicro.com> | 2021-09-23 15:43:23 +0200 |
commit | 94acf7a7976fb1cddd5a8c7228694aa308b6532c (patch) | |
tree | 9c832b7fe1e6b5c3a90ecf8ebdbba55dc2cefc02 /fpga_interchange/chipdb.h | |
parent | 3cd459912a23b03640e3e1621dd454874ed11381 (diff) | |
download | nextpnr-94acf7a7976fb1cddd5a8c7228694aa308b6532c.tar.gz nextpnr-94acf7a7976fb1cddd5a8c7228694aa308b6532c.tar.bz2 nextpnr-94acf7a7976fb1cddd5a8c7228694aa308b6532c.zip |
Change Cluster placement algorithm
Use physical placement from device DB
It should reduce runtime
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
Diffstat (limited to 'fpga_interchange/chipdb.h')
-rw-r--r-- | fpga_interchange/chipdb.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h index 0f57bdc0..4e09f704 100644 --- a/fpga_interchange/chipdb.h +++ b/fpga_interchange/chipdb.h @@ -451,6 +451,14 @@ NPNR_PACKED_STRUCT(struct ClusterConnectionGraphPOD{ RelSlice<ClusterUsedPortPOD> used_ports; }); +NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementEntryPOD{ + RelSlice<uint32_t> bels; +}); + +NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementsPOD{ + uint32_t site_type; + RelSlice<ClusterPhysicalPlacementEntryPOD> places; +}); NPNR_PACKED_STRUCT(struct ClusterPOD { uint32_t name; @@ -459,6 +467,7 @@ NPNR_PACKED_STRUCT(struct ClusterPOD { RelSlice<ClusterCellPortPOD> cluster_cells_map; RelSlice<ClusterRequiredCellPOD> required_cells; RelSlice<ClusterConnectionGraphPOD> connection_graph; + RelSlice<ClusterPhysicalPlacementsPOD> physical_placements; uint32_t out_of_site_clusters; uint32_t disallow_other_cells; uint32_t from_macro; |