Merge pull request #604 from litghost/add_counter_test

Add counter test for FPGA interchange

1 files changed, 15 insertions, 0 deletions

diff --git a/fpga_interchange/examples/counter/counter.v b/fpga_interchange/examples/counter/counter.v
new file mode 100644
index 00000000..00f52a20
--- /dev/null
+++ b/fpga_interchange/examples/counter/counter.v
@@ -0,0 +1,15 @@
+module top(input clk, input rst, output [7:4] io_led);
+
+reg [31:0] counter = 32'b0;
+
+assign io_led = counter >> 22;
+
+always @(posedge clk)
+begin
+    if(rst)
+        counter <= 32'b0;
+    else
+        counter <= counter + 1;
+end
+
+endmodule