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| author | gatecat <gatecat@ds0.me> | 2021-03-03 07:06:07 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-03-03 07:06:07 +0000 |
| commit | 6e38e236f88db749788fb74a6fa8ac0c80b6035b (patch) | |
| tree | dfab73bc8afa157ebf323a8f6c9b54d0998392f0 /fpga_interchange/examples/counter/run.tcl | |
| parent | 27fbee523301be074abd06a3568dc9591d98e0fa (diff) | |
| parent | 71b92cb8139c63a7936fa05f2a47739b0c115b01 (diff) | |
| download | nextpnr-6e38e236f88db749788fb74a6fa8ac0c80b6035b.tar.gz nextpnr-6e38e236f88db749788fb74a6fa8ac0c80b6035b.tar.bz2 nextpnr-6e38e236f88db749788fb74a6fa8ac0c80b6035b.zip | |
Merge pull request #604 from litghost/add_counter_test
Add counter test for FPGA interchange
Diffstat (limited to 'fpga_interchange/examples/counter/run.tcl')
| -rw-r--r-- | fpga_interchange/examples/counter/run.tcl | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/fpga_interchange/examples/counter/run.tcl b/fpga_interchange/examples/counter/run.tcl new file mode 100644 index 00000000..245aab04 --- /dev/null +++ b/fpga_interchange/examples/counter/run.tcl @@ -0,0 +1,15 @@ +yosys -import + +read_verilog counter.v + +synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp +techmap -map ../remap.v + +# opt_expr -undriven makes sure all nets are driven, if only by the $undef +# net. +opt_expr -undriven +opt_clean + +setundef -zero -params + +write_json build/counter.json |