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author | gatecat <gatecat@ds0.me> | 2021-03-17 14:05:49 +0000 |
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committer | GitHub <noreply@github.com> | 2021-03-17 14:05:49 +0000 |
commit | 5feea4497f416eafdf54f34c2b9c67ddcef3f26f (patch) | |
tree | e92427a879159b38441e6b3fc4f0e45ebc75e579 /fpga_interchange/examples/devices/xc7a35t/test_data.yaml | |
parent | 701587241fb8d4b490c4998ab3f2590bc09d7f55 (diff) | |
parent | 01a95faf211d5947415ed6a9ea2b1fbedf1074cd (diff) | |
download | nextpnr-5feea4497f416eafdf54f34c2b9c67ddcef3f26f.tar.gz nextpnr-5feea4497f416eafdf54f34c2b9c67ddcef3f26f.tar.bz2 nextpnr-5feea4497f416eafdf54f34c2b9c67ddcef3f26f.zip |
Merge pull request #619 from acomodi/add-cmake-infra-fpga-interchange
Add CMake infrastructure for fpga interchange
Diffstat (limited to 'fpga_interchange/examples/devices/xc7a35t/test_data.yaml')
-rw-r--r-- | fpga_interchange/examples/devices/xc7a35t/test_data.yaml | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/fpga_interchange/examples/devices/xc7a35t/test_data.yaml b/fpga_interchange/examples/devices/xc7a35t/test_data.yaml new file mode 100644 index 00000000..268d180a --- /dev/null +++ b/fpga_interchange/examples/devices/xc7a35t/test_data.yaml @@ -0,0 +1,36 @@ +pip_test: + - src_wire: CLBLM_R_X11Y93/CLBLM_L_D3 + dst_wire: SLICE_X15Y93.SLICEL/D3 +pip_chain_test: + - wires: + - $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE + - $CONSTANTS_X0Y0/$GND_NODE + - TIEOFF_X3Y145.TIEOFF/$GND_SITE_WIRE + - TIEOFF_X3Y145.TIEOFF/HARD0GND_HARD0 + - INT_R_X3Y145/GND_WIRE + - wires: + - $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE + - $CONSTANTS_X0Y0/$VCC_NODE + - TIEOFF_X3Y145.TIEOFF/$VCC_SITE_WIRE + - TIEOFF_X3Y145.TIEOFF/HARD1VCC_HARD1 + - INT_R_X3Y145/VCC_WIRE + - wires: + - $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE + - $CONSTANTS_X0Y0/$VCC_NODE + - SLICE_X3Y145.SLICEL/$VCC_SITE_WIRE + - SLICE_X3Y145.SLICEL/CEUSEDVCC_HARD1 + - wires: + - $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE + - $CONSTANTS_X0Y0/$GND_NODE + - SLICE_X3Y145.SLICEL/$GND_SITE_WIRE + - SLICE_X3Y145.SLICEL/SRUSEDGND_HARD0 +bel_pin_test: + - bel: SLICE_X15Y93.SLICEL/D6LUT + pin: A3 + wire: SLICE_X15Y93.SLICEL/D3 + - bel: $CONSTANTS_X0Y0.$CONSTANTS/GND + pin: G + wire: $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE + - bel: $CONSTANTS_X0Y0.$CONSTANTS/VCC + pin: P + wire: $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE |