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| author | gatecat <gatecat@ds0.me> | 2021-06-01 11:45:34 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-06-01 11:45:34 +0100 |
| commit | 665ab09d209d9aa9be4e67ef9401b8c7768e8f3c (patch) | |
| tree | dd0776a3d57a596b15a3c6c52f7d203cb1094cc1 /fpga_interchange/examples/devices | |
| parent | 24ae205f20f0e1a0326e48002ab14d5bacfca1ef (diff) | |
| parent | 0426ba4e877c0ec1130d8ab7bc74e70cc4e406bf (diff) | |
| download | nextpnr-665ab09d209d9aa9be4e67ef9401b8c7768e8f3c.tar.gz nextpnr-665ab09d209d9aa9be4e67ef9401b8c7768e8f3c.tar.bz2 nextpnr-665ab09d209d9aa9be4e67ef9401b8c7768e8f3c.zip | |
Merge pull request #715 from YosysHQ/gatecat/ic-lifcl40
interchange: Add LIFCL-40 EVN tests
Diffstat (limited to 'fpga_interchange/examples/devices')
| -rw-r--r-- | fpga_interchange/examples/devices/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt | 13 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-40/test_data.yaml | 8 |
3 files changed, 22 insertions, 0 deletions
diff --git a/fpga_interchange/examples/devices/CMakeLists.txt b/fpga_interchange/examples/devices/CMakeLists.txt index ff01bd3c..1cf8ad43 100644 --- a/fpga_interchange/examples/devices/CMakeLists.txt +++ b/fpga_interchange/examples/devices/CMakeLists.txt @@ -8,3 +8,4 @@ add_subdirectory(xc7z010) # Nexus devices add_subdirectory(LIFCL-17) +add_subdirectory(LIFCL-40) diff --git a/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt b/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt new file mode 100644 index 00000000..d6310116 --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-40/CMakeLists.txt @@ -0,0 +1,13 @@ +generate_nexus_device_db( + device LIFCL-40 + device_target lifcl40_target +) + +generate_chipdb( + family ${family} + device LIFCL-40 + part LIFCL-40-9BG400C + device_target ${lifcl40_target} + device_config ${PYTHON_INTERCHANGE_PATH}/test_data/nexus_device_config.yaml + test_package CABGA400 +) diff --git a/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml b/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml new file mode 100644 index 00000000..c4787eba --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-40/test_data.yaml @@ -0,0 +1,8 @@ +pip_test: + - src_wire: R3C3_PLC.PLC/JDI0_SLICEA + dst_wire: R3C3/JF0 +bel_pin_test: + - bel: R7C3_PLC.PLC/SLICEA_LUT0 + pin: D + wire: R7C3_PLC.PLC/JD0_SLICEA + |