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| author | gatecat <gatecat@ds0.me> | 2021-03-31 15:14:51 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-03-31 15:14:51 +0100 |
| commit | ec98fee1eefd61d17ccfaf58bae72e1cc0f9e5e3 (patch) | |
| tree | 560c2e21d9a5c4bb5d55f7e62b77c141f39e651e /fpga_interchange/examples/devices | |
| parent | edecc06fcfbedf23773cd8ba04f1eb6f5bd64358 (diff) | |
| parent | 3678eff5dc13b301f7841d2079ba265bbe3fac2b (diff) | |
| download | nextpnr-ec98fee1eefd61d17ccfaf58bae72e1cc0f9e5e3.tar.gz nextpnr-ec98fee1eefd61d17ccfaf58bae72e1cc0f9e5e3.tar.bz2 nextpnr-ec98fee1eefd61d17ccfaf58bae72e1cc0f9e5e3.zip | |
Merge pull request #646 from YosysHQ/gatecat/nexus-cmake
fpga_interchange: Add CMake support for Nexus/prjoxide
Diffstat (limited to 'fpga_interchange/examples/devices')
| -rw-r--r-- | fpga_interchange/examples/devices/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-17/CMakeLists.txt | 13 | ||||
| -rw-r--r-- | fpga_interchange/examples/devices/LIFCL-17/test_data.yaml | 8 |
3 files changed, 24 insertions, 0 deletions
diff --git a/fpga_interchange/examples/devices/CMakeLists.txt b/fpga_interchange/examples/devices/CMakeLists.txt index 965e4aa8..ff01bd3c 100644 --- a/fpga_interchange/examples/devices/CMakeLists.txt +++ b/fpga_interchange/examples/devices/CMakeLists.txt @@ -5,3 +5,6 @@ add_subdirectory(xc7a200t) # Zynq-7 devices add_subdirectory(xc7z010) + +# Nexus devices +add_subdirectory(LIFCL-17) diff --git a/fpga_interchange/examples/devices/LIFCL-17/CMakeLists.txt b/fpga_interchange/examples/devices/LIFCL-17/CMakeLists.txt new file mode 100644 index 00000000..572ff200 --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-17/CMakeLists.txt @@ -0,0 +1,13 @@ +generate_nexus_device_db( + device LIFCL-17 + device_target lifcl17_target +) + +generate_chipdb( + family ${family} + device LIFCL-17 + part LIFCL-17-7SG72C + device_target ${lifcl17_target} + device_config ${PYTHON_INTERCHANGE_PATH}/test_data/nexus_device_config.yaml + test_package QFN72 +) diff --git a/fpga_interchange/examples/devices/LIFCL-17/test_data.yaml b/fpga_interchange/examples/devices/LIFCL-17/test_data.yaml new file mode 100644 index 00000000..c4787eba --- /dev/null +++ b/fpga_interchange/examples/devices/LIFCL-17/test_data.yaml @@ -0,0 +1,8 @@ +pip_test: + - src_wire: R3C3_PLC.PLC/JDI0_SLICEA + dst_wire: R3C3/JF0 +bel_pin_test: + - bel: R7C3_PLC.PLC/SLICEA_LUT0 + pin: D + wire: R7C3_PLC.PLC/JD0_SLICEA + |