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authorAlessandro Comodi <acomodi@antmicro.com>2021-04-07 12:07:10 +0200
committerAlessandro Comodi <acomodi@antmicro.com>2021-04-14 14:36:07 +0200
commitdfc9c3df8c016c26d8abe985d313b1bf81b4cc82 (patch)
tree9980d457fe97f3db67ba8dc16287bf9c607b0eb8 /fpga_interchange/examples/tests/lut/arty100t.xdc
parent2912860c9788033a7501726e77bb4962b394280d (diff)
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interchange: add FASM generation target and clean-up tests
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Diffstat (limited to 'fpga_interchange/examples/tests/lut/arty100t.xdc')
-rw-r--r--fpga_interchange/examples/tests/lut/arty100t.xdc7
1 files changed, 7 insertions, 0 deletions
diff --git a/fpga_interchange/examples/tests/lut/arty100t.xdc b/fpga_interchange/examples/tests/lut/arty100t.xdc
new file mode 100644
index 00000000..1dba6574
--- /dev/null
+++ b/fpga_interchange/examples/tests/lut/arty100t.xdc
@@ -0,0 +1,7 @@
+set_property PACKAGE_PIN A8 [get_ports i0]
+set_property PACKAGE_PIN C11 [get_ports i1]
+set_property PACKAGE_PIN H5 [get_ports o]
+
+set_property IOSTANDARD LVCMOS33 [get_ports i0]
+set_property IOSTANDARD LVCMOS33 [get_ports i1]
+set_property IOSTANDARD LVCMOS33 [get_ports o]