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authorgatecat <gatecat@ds0.me>2021-04-14 14:28:01 +0100
committerGitHub <noreply@github.com>2021-04-14 14:28:01 +0100
commit8f5185c3814f5fcf90aa33b07b99568d465bb5cd (patch)
treec7fc666a560040ae81e0c2b39e19771a07c9fdf8 /fpga_interchange/examples/tests/lut/arty35t.xdc
parentb26088f940d512174154cef3954f3a9b6c9642e7 (diff)
parentea9e12b6ae1034422a1abcc64afbd81a59a720ea (diff)
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Merge pull request #678 from acomodi/initial-fasm-generation
interchange: add FASM generation target and clean-up tests
Diffstat (limited to 'fpga_interchange/examples/tests/lut/arty35t.xdc')
-rw-r--r--fpga_interchange/examples/tests/lut/arty35t.xdc7
1 files changed, 7 insertions, 0 deletions
diff --git a/fpga_interchange/examples/tests/lut/arty35t.xdc b/fpga_interchange/examples/tests/lut/arty35t.xdc
new file mode 100644
index 00000000..1dba6574
--- /dev/null
+++ b/fpga_interchange/examples/tests/lut/arty35t.xdc
@@ -0,0 +1,7 @@
+set_property PACKAGE_PIN A8 [get_ports i0]
+set_property PACKAGE_PIN C11 [get_ports i1]
+set_property PACKAGE_PIN H5 [get_ports o]
+
+set_property IOSTANDARD LVCMOS33 [get_ports i0]
+set_property IOSTANDARD LVCMOS33 [get_ports i1]
+set_property IOSTANDARD LVCMOS33 [get_ports o]