aboutsummaryrefslogtreecommitdiffstats
path: root/fpga_interchange/examples/tests/wire/wire_zybo.xdc
diff options
context:
space:
mode:
authorAlessandro Comodi <acomodi@antmicro.com>2021-03-17 18:43:29 +0100
committerAlessandro Comodi <acomodi@antmicro.com>2021-03-23 20:36:23 +0100
commit336d31cbcf592455abdbefc01ec5c6f87914b4f3 (patch)
tree339cbe71a677180a466fbab7a6718fd449d6f759 /fpga_interchange/examples/tests/wire/wire_zybo.xdc
parent3cc50a5744beeae63ffb9ecd2064666e90d26be4 (diff)
downloadnextpnr-336d31cbcf592455abdbefc01ec5c6f87914b4f3.tar.gz
nextpnr-336d31cbcf592455abdbefc01ec5c6f87914b4f3.tar.bz2
nextpnr-336d31cbcf592455abdbefc01ec5c6f87914b4f3.zip
fpga_interchange: add more devices
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
Diffstat (limited to 'fpga_interchange/examples/tests/wire/wire_zybo.xdc')
-rw-r--r--fpga_interchange/examples/tests/wire/wire_zybo.xdc5
1 files changed, 5 insertions, 0 deletions
diff --git a/fpga_interchange/examples/tests/wire/wire_zybo.xdc b/fpga_interchange/examples/tests/wire/wire_zybo.xdc
new file mode 100644
index 00000000..072c19d2
--- /dev/null
+++ b/fpga_interchange/examples/tests/wire/wire_zybo.xdc
@@ -0,0 +1,5 @@
+set_property PACKAGE_PIN G15 [get_ports i]
+set_property PACKAGE_PIN M14 [get_ports o]
+
+set_property IOSTANDARD LVCMOS33 [get_ports i]
+set_property IOSTANDARD LVCMOS33 [get_ports o]