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| author | Maciej Kurc <mkurc@antmicro.com> | 2021-07-16 16:01:21 +0200 |
|---|---|---|
| committer | Maciej Kurc <mkurc@antmicro.com> | 2021-07-22 12:59:10 +0200 |
| commit | 8fc16a57c9dee5e7e0f83752a62612f70f18a38e (patch) | |
| tree | ac90d66d237215ef241bb05dd2781948bc8f4a75 /fpga_interchange/luts.cc | |
| parent | ccf2bb123c4c2f52142c82c3b6338856df4fbb80 (diff) | |
| download | nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.tar.gz nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.tar.bz2 nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.zip | |
Added more code comments, formatted the code
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Diffstat (limited to 'fpga_interchange/luts.cc')
| -rw-r--r-- | fpga_interchange/luts.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/fpga_interchange/luts.cc b/fpga_interchange/luts.cc index 9c68739e..d9e17ca9 100644 --- a/fpga_interchange/luts.cc +++ b/fpga_interchange/luts.cc @@ -255,7 +255,8 @@ uint32_t LutMapper::check_wires(const std::vector<std::vector<int32_t>> &bel_to_ return vcc_mask; } -bool LutMapper::remap_luts(const Context *ctx, SiteLutMappingResult* lut_mapping, pool<const LutBel *, hash_ptr_ops> *blocked_luts) +bool LutMapper::remap_luts(const Context *ctx, SiteLutMappingResult *lut_mapping, + pool<const LutBel *, hash_ptr_ops> *blocked_luts) { dict<NetInfo *, LutPin, hash_ptr_ops> lut_pin_map; std::vector<const LutBel *> lut_bels; @@ -417,7 +418,7 @@ bool LutMapper::remap_luts(const Context *ctx, SiteLutMappingResult* lut_mapping // Cell to BEL pin map for (size_t pin_idx = 0; pin_idx < cellInfo->lut_cell.pins.size(); ++pin_idx) { IdString cellPin = cellInfo->lut_cell.pins[pin_idx]; - IdString belPin = lutBel.pins[cell_to_bel_pin_remaps[cell_idx][pin_idx]]; + IdString belPin = lutBel.pins[cell_to_bel_pin_remaps[cell_idx][pin_idx]]; cell.belPins[cellPin] = belPin; } |