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authormyrtle <gatecat@ds0.me>2022-05-13 09:09:50 +0100
committerGitHub <noreply@github.com>2022-05-13 09:09:50 +0100
commit4ecbf6c6e941699413e0d0bba660fc9dc18efcfe (patch)
tree4dc7868ffbb4d86e45fb5874e17b88d747e72bfc /fpga_interchange/luts.h
parent41936fefac2b819ad77204f0ed64ba01e9138c2a (diff)
parentd75c45c63f444af0349463346101c9d7d7ae6283 (diff)
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Merge pull request #985 from antmicro/interchange-lut-constants
[interchange] Tying unused LUT inputs according to architecture
Diffstat (limited to 'fpga_interchange/luts.h')
-rw-r--r--fpga_interchange/luts.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h
index 8f33507a..892f457c 100644
--- a/fpga_interchange/luts.h
+++ b/fpga_interchange/luts.h
@@ -42,11 +42,22 @@ enum LogicLevel
struct LutCell
{
+ enum class PinConnection
+ {
+ Unconnected,
+ Gnd,
+ Vcc,
+ Const,
+ Signal
+ };
+
// LUT cell pins for equation, LSB first.
std::vector<IdString> pins;
pool<IdString> lut_pins;
- pool<IdString> vcc_pins;
+ dict<IdString, PinConnection> pin_connections;
DynamicBitarray<> equation;
+
+ static const std::string nameOfPinConnection(PinConnection conn);
};
struct LutBel