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authorgatecat <gatecat@ds0.me>2021-07-22 14:09:40 +0100
committerGitHub <noreply@github.com>2021-07-22 14:09:40 +0100
commit5212e38512586a6aea0a3b075d30cd172026cd3e (patch)
tree9ea2c4a1091424cd131e8fdab67a4f9339213894 /fpga_interchange/main.cc
parent8733cce5fa44e095e654f487781555bd20edc48f (diff)
parent580a45485afe48a77272f44f8aa99875cdd4d441 (diff)
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Merge pull request #757 from antmicro/lut-mapping-cache
interchange: Add caching of site LUT mapping solution
Diffstat (limited to 'fpga_interchange/main.cc')
-rw-r--r--fpga_interchange/main.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/fpga_interchange/main.cc b/fpga_interchange/main.cc
index 64a15e62..5423c17d 100644
--- a/fpga_interchange/main.cc
+++ b/fpga_interchange/main.cc
@@ -57,6 +57,7 @@ po::options_description FpgaInterchangeCommandHandler::getArchOptions()
specific.add_options()("package", po::value<std::string>(), "Package to use");
specific.add_options()("rebuild-lookahead", "Ignore lookahead cache and rebuild");
specific.add_options()("dont-write-lookahead", "Don't write the lookahead file");
+ specific.add_options()("disable-lut-mapping-cache", "Disable caching of LUT mapping solutions in site router");
return specific;
}
@@ -76,6 +77,7 @@ std::unique_ptr<Context> FpgaInterchangeCommandHandler::createContext(dict<std::
ArchArgs chipArgs;
chipArgs.rebuild_lookahead = vm.count("rebuild_lookahead") != 0;
chipArgs.dont_write_lookahead = vm.count("dont_write_lookahead") != 0;
+ chipArgs.disable_lut_mapping_cache = vm.count("disable-lut-mapping-cache") != 0;
if (!vm.count("chipdb")) {
log_error("chip database binary must be provided\n");