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authorgatecat <gatecat@ds0.me>2021-07-14 17:44:50 +0100
committerGitHub <noreply@github.com>2021-07-14 17:44:50 +0100
commit084e15f9cf421786c3b0db8ea929211323bc4307 (patch)
tree9e54a4ad4e54053a7cdad0a87e9a955292cfe2a3 /fpga_interchange
parent034467ff615494b2a74cee08081cb17edc9ea1a4 (diff)
parent9190bda27d524dcf827208ea7cf40a198b3334c8 (diff)
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Merge pull request #762 from antmicro/testarch_timing
[interchange] Update chipdb and python-fpga-interchange versions
Diffstat (limited to 'fpga_interchange')
-rw-r--r--fpga_interchange/chipdb.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h
index 15ef8b07..9ebbc1f3 100644
--- a/fpga_interchange/chipdb.h
+++ b/fpga_interchange/chipdb.h
@@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN
* kExpectedChipInfoVersion
*/
-static constexpr int32_t kExpectedChipInfoVersion = 12;
+static constexpr int32_t kExpectedChipInfoVersion = 13;
// Flattened site indexing.
//