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authorMaciej Kurc <mkurc@antmicro.com>2021-07-22 14:07:35 +0200
committerMaciej Kurc <mkurc@antmicro.com>2021-07-22 14:07:35 +0200
commit580a45485afe48a77272f44f8aa99875cdd4d441 (patch)
treecd856761140c200127b61fed5f1268fe079d8405 /fpga_interchange
parent8fc16a57c9dee5e7e0f83752a62612f70f18a38e (diff)
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Added an option to disable the LUT mapping cache
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Diffstat (limited to 'fpga_interchange')
-rw-r--r--fpga_interchange/arch.cc10
-rw-r--r--fpga_interchange/arch.h3
-rw-r--r--fpga_interchange/main.cc2
-rw-r--r--fpga_interchange/site_lut_mapping_cache.h2
-rw-r--r--fpga_interchange/site_router.cc7
5 files changed, 16 insertions, 8 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc
index 64eef2ad..3b0572fa 100644
--- a/fpga_interchange/arch.cc
+++ b/fpga_interchange/arch.cc
@@ -814,10 +814,12 @@ bool Arch::place()
archInfoToAttributes();
// Print site LUT mapping caching stats
- log_info("Site LUT mapping cache stats:\n");
- log_info(" miss ratio: %.1f%%\n", getCtx()->site_lut_mapping_cache.getMissRatio() * 100.0f);
- log_info(" peak size : %zuMB (%zu items)\n", getCtx()->site_lut_mapping_cache.getSizeMB(),
- getCtx()->site_lut_mapping_cache.getCount());
+ if (!getCtx()->arch_args.disable_lut_mapping_cache) {
+ log_info("Site LUT mapping cache stats:\n");
+ log_info(" miss ratio: %.1f%%\n", getCtx()->site_lut_mapping_cache.getMissRatio() * 100.0f);
+ log_info(" peak size : %zuMB (%zu items)\n", getCtx()->site_lut_mapping_cache.getSizeMB(),
+ getCtx()->site_lut_mapping_cache.getCount());
+ }
getCtx()->check();
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index de7232d4..36f6a7dc 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -39,9 +39,9 @@
#include "dedicated_interconnect.h"
#include "lookahead.h"
#include "pseudo_pip_model.h"
+#include "site_lut_mapping_cache.h"
#include "site_router.h"
#include "site_routing_cache.h"
-#include "site_lut_mapping_cache.h"
NEXTPNR_NAMESPACE_BEGIN
@@ -51,6 +51,7 @@ struct ArchArgs
std::string package;
bool rebuild_lookahead;
bool dont_write_lookahead;
+ bool disable_lut_mapping_cache;
};
struct ArchRanges
diff --git a/fpga_interchange/main.cc b/fpga_interchange/main.cc
index 64a15e62..5423c17d 100644
--- a/fpga_interchange/main.cc
+++ b/fpga_interchange/main.cc
@@ -57,6 +57,7 @@ po::options_description FpgaInterchangeCommandHandler::getArchOptions()
specific.add_options()("package", po::value<std::string>(), "Package to use");
specific.add_options()("rebuild-lookahead", "Ignore lookahead cache and rebuild");
specific.add_options()("dont-write-lookahead", "Don't write the lookahead file");
+ specific.add_options()("disable-lut-mapping-cache", "Disable caching of LUT mapping solutions in site router");
return specific;
}
@@ -76,6 +77,7 @@ std::unique_ptr<Context> FpgaInterchangeCommandHandler::createContext(dict<std::
ArchArgs chipArgs;
chipArgs.rebuild_lookahead = vm.count("rebuild_lookahead") != 0;
chipArgs.dont_write_lookahead = vm.count("dont_write_lookahead") != 0;
+ chipArgs.disable_lut_mapping_cache = vm.count("disable-lut-mapping-cache") != 0;
if (!vm.count("chipdb")) {
log_error("chip database binary must be provided\n");
diff --git a/fpga_interchange/site_lut_mapping_cache.h b/fpga_interchange/site_lut_mapping_cache.h
index 0025b889..7b1d60a4 100644
--- a/fpga_interchange/site_lut_mapping_cache.h
+++ b/fpga_interchange/site_lut_mapping_cache.h
@@ -20,8 +20,8 @@
#ifndef SITE_LUT_MAPPING_CACHE_H
#define SITE_LUT_MAPPING_CACHE_H
-#include "nextpnr_namespaces.h"
#include "idstring.h"
+#include "nextpnr_namespaces.h"
#include "site_arch.h"
NEXTPNR_NAMESPACE_BEGIN
diff --git a/fpga_interchange/site_router.cc b/fpga_interchange/site_router.cc
index 4094b331..820b8d68 100644
--- a/fpga_interchange/site_router.cc
+++ b/fpga_interchange/site_router.cc
@@ -1041,13 +1041,14 @@ static void apply_routing(Context *ctx, const SiteArch &site_arch, pool<std::pai
static bool map_luts_in_site(const SiteInformation &site_info, pool<std::pair<IdString, IdString>> *blocked_wires)
{
const Context *ctx = site_info.ctx;
+ bool enable_cache = !ctx->arch_args.disable_lut_mapping_cache;
// Create a site LUT mapping key
SiteLutMappingKey key = SiteLutMappingKey::create(site_info);
// Get the solution from cache. If not found then compute it
SiteLutMappingResult lutMapping;
- if (!ctx->site_lut_mapping_cache.get(key, &lutMapping)) {
+ if (!enable_cache || !ctx->site_lut_mapping_cache.get(key, &lutMapping)) {
const std::vector<LutElement> &lut_elements = ctx->lut_elements.at(site_info.tile_type);
std::vector<LutMapper> lut_mappers;
@@ -1090,7 +1091,9 @@ static bool map_luts_in_site(const SiteInformation &site_info, pool<std::pair<Id
lutMapping.isValid = res;
// Add the solution to the cache
- ctx->site_lut_mapping_cache.add(key, lutMapping);
+ if (enable_cache) {
+ ctx->site_lut_mapping_cache.add(key, lutMapping);
+ }
}
// Apply the solution if valid