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| author | gatecat <gatecat@ds0.me> | 2021-12-19 16:41:34 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-12-19 17:15:15 +0000 |
| commit | ddb084e9a8a0cba10536951236cde824526e8071 (patch) | |
| tree | d03ba5688367cb476a06b19d04ca78d0352afce3 /fpga_interchange | |
| parent | 56d550733346000584b9490fac0953fe07124035 (diff) | |
| download | nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.gz nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.tar.bz2 nextpnr-ddb084e9a8a0cba10536951236cde824526e8071.zip | |
archapi: Use arbitrary rather than actual placement in predictDelay
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.
A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange')
| -rw-r--r-- | fpga_interchange/arch.cc | 8 | ||||
| -rw-r--r-- | fpga_interchange/arch.h | 2 |
2 files changed, 6 insertions, 4 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index a39f49e6..917af85e 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -1000,14 +1000,16 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const #endif } -delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const +delay_t Arch::predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const { // FIXME: Implement when adding timing-driven place and route. + NPNR_UNUSED(src_pin); + NPNR_UNUSED(dst_pin); int src_x, src_y; - get_tile_x_y(net_info->driver.cell->bel.tile, &src_x, &src_y); + get_tile_x_y(src_bel.tile, &src_x, &src_y); int dst_x, dst_y; - get_tile_x_y(sink.cell->bel.tile, &dst_x, &dst_y); + get_tile_x_y(dst_bel.tile, &dst_x, &dst_y); delay_t base = 30 * std::min(std::abs(dst_x - src_x), 18) + 10 * std::max(std::abs(dst_x - src_x) - 18, 0) + 60 * std::min(std::abs(dst_y - src_y), 6) + 20 * std::max(std::abs(dst_y - src_y) - 6, 0) + 300; diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 482bf911..8bb2e2d1 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -700,7 +700,7 @@ struct Arch : ArchAPI<ArchRanges> // ------------------------------------------------- delay_t estimateDelay(WireId src, WireId dst) const final; - delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const final; + delay_t predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const final; ArcBounds getRouteBoundingBox(WireId src, WireId dst) const final; delay_t getDelayEpsilon() const final { return 20; } delay_t getRipupDelayPenalty() const final { return 120; } |