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author | gatecat <gatecat@ds0.me> | 2021-02-15 09:58:56 +0000 |
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committer | gatecat <gatecat@ds0.me> | 2021-02-15 09:58:56 +0000 |
commit | a002ccfbc1b627a8de921e7940e9ffe37dc94ca3 (patch) | |
tree | cba53fb43bf9a4eee1eed9f30c31ab4a624d3a25 /generic/arch_pybindings.cc | |
parent | 065f46daeb05a8b12cc663a44410b6da27a8d9e3 (diff) | |
download | nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.tar.gz nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.tar.bz2 nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.zip |
generic: Add APIs for controlling cell->bel pin mapping
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'generic/arch_pybindings.cc')
-rw-r--r-- | generic/arch_pybindings.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/generic/arch_pybindings.cc b/generic/arch_pybindings.cc index 3dc04206..35ec3b33 100644 --- a/generic/arch_pybindings.cc +++ b/generic/arch_pybindings.cc @@ -226,6 +226,14 @@ void arch_wrap_python(py::module &m) pass_through<DelayInfo>>::def_wrap(ctx_cls, "addCellTimingClockToOut", "cell"_a, "port"_a, "clock"_a, "clktoq"_a); + fn_wrapper_2a_v<Context, decltype(&Context::clearCellBelPinMap), &Context::clearCellBelPinMap, + conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "clearCellBelPinMap", "cell"_a, + "cell_pin"_a); + fn_wrapper_3a_v<Context, decltype(&Context::addCellBelPinMapping), &Context::addCellBelPinMapping, + conv_from_str<IdString>, conv_from_str<IdString>, + conv_from_str<IdString>>::def_wrap(ctx_cls, "addCellBelPinMapping", "cell"_a, "cell_pin"_a, + "bel_pin"_a); + // const\_range\<BelBucketId\> getBelBuckets() const fn_wrapper_0a<Context, decltype(&Context::getBelBuckets), &Context::getBelBuckets, wrap_context<const std::vector<BelBucketId> &>>::def_wrap(ctx_cls, "getBelBuckets"); |