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| author | gatecat <gatecat@ds0.me> | 2021-02-15 09:58:56 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-02-15 09:58:56 +0000 |
| commit | a002ccfbc1b627a8de921e7940e9ffe37dc94ca3 (patch) | |
| tree | cba53fb43bf9a4eee1eed9f30c31ab4a624d3a25 /generic/archdefs.h | |
| parent | 065f46daeb05a8b12cc663a44410b6da27a8d9e3 (diff) | |
| download | nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.tar.gz nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.tar.bz2 nextpnr-a002ccfbc1b627a8de921e7940e9ffe37dc94ca3.zip | |
generic: Add APIs for controlling cell->bel pin mapping
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'generic/archdefs.h')
| -rw-r--r-- | generic/archdefs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/generic/archdefs.h b/generic/archdefs.h index fad36894..30503414 100644 --- a/generic/archdefs.h +++ b/generic/archdefs.h @@ -68,6 +68,8 @@ struct ArchCellInfo bool is_slice; // Only packing rule for slice type primitives is a single clock per tile const NetInfo *slice_clk; + // Cell to bel pin mapping + std::unordered_map<IdString, std::vector<IdString>> bel_pins; }; NEXTPNR_NAMESPACE_END |