generic: Simple procedural example works

Signed-off-by: David Shah <dave@ds0.me>

4 files changed, 87 insertions, 7 deletions

diff --git a/generic/arch.cc b/generic/arch.cc
index a0123d9e..01f7ef55 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -268,7 +268,13 @@ IdString Arch::getBelType(BelId bel) const { return bels.at(bel).type; }
 
 const std::map<IdString, std::string> &Arch::getBelAttrs(BelId bel) const { return bels.at(bel).attrs; }
 
-WireId Arch::getBelPinWire(BelId bel, IdString pin) const { return bels.at(bel).pins.at(pin).wire; }
+WireId Arch::getBelPinWire(BelId bel, IdString pin) const
+{
+    const auto &bdata = bels.at(bel);
+    if (!bdata.pins.count(pin))
+        log_error("bel '%s' has no pin '%s'\n", bel.c_str(this), pin.c_str(this));
+    return bdata.pins.at(pin).wire;
+}
 
 PortType Arch::getBelPinType(BelId bel, IdString pin) const { return bels.at(bel).pins.at(pin).type; }
 
@@ -430,7 +436,7 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
     const WireInfo &d = wires.at(dst);
     int dx = abs(s.x - d.x);
     int dy = abs(s.y - d.y);
-    return (dx + dy) * grid_distance_to_delay;
+    return (dx + dy) * args.delayScale + args.delayOffset;
 }
 
 delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
@@ -441,7 +447,7 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
 
     int dx = abs(driver_loc.x - driver_loc.x);
     int dy = abs(sink_loc.y - sink_loc.y);
-    return (dx + dy) * grid_distance_to_delay;
+    return (dx + dy) * args.delayScale + args.delayOffset;
 }
 
 bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; }
diff --git a/generic/arch.h b/generic/arch.h
index 58e5faa4..02017c8d 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -106,8 +106,6 @@ struct Arch : BaseCtx
     std::vector<std::vector<int>> tileBelDimZ;
     std::vector<std::vector<int>> tilePipDimZ;
 
-    float grid_distance_to_delay;
-
     void addWire(IdString name, IdString type, int x, int y);
     void addPip(IdString name, IdString type, IdString srcWire, IdString dstWire, DelayInfo delay, Loc loc);
     void addAlias(IdString name, IdString type, IdString srcWire, IdString dstWire, DelayInfo delay);
diff --git a/generic/arch_pybindings.cc b/generic/arch_pybindings.cc
index 014b7758..950e7e34 100644
--- a/generic/arch_pybindings.cc
+++ b/generic/arch_pybindings.cc
@@ -40,6 +40,8 @@ void arch_wrap_python()
 
     class_<BelPin>("BelPin").def_readwrite("bel", &BelPin::bel).def_readwrite("pin", &BelPin::pin);
 
+    class_<DelayInfo>("DelayInfo").def("maxDelay", &DelayInfo::maxDelay).def("minDelay", &DelayInfo::minDelay);
+
     fn_wrapper_1a<Context, decltype(&Context::getBelType), &Context::getBelType, conv_to_str<IdString>,
                   conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelType");
     fn_wrapper_1a<Context, decltype(&Context::checkBelAvail), &Context::checkBelAvail, pass_through<bool>,
@@ -109,6 +111,9 @@ void arch_wrap_python()
     fn_wrapper_1a<Context, decltype(&Context::getPipDelay), &Context::getPipDelay, pass_through<DelayInfo>,
                   conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDelay");
 
+    fn_wrapper_1a<Context, decltype(&Context::getDelayFromNS), &Context::getDelayFromNS, pass_through<DelayInfo>,
+                  pass_through<double>>::def_wrap(ctx_cls, "getDelayFromNS");
+
     fn_wrapper_0a<Context, decltype(&Context::getChipName), &Context::getChipName, pass_through<std::string>>::def_wrap(
             ctx_cls, "getChipName");
     fn_wrapper_0a<Context, decltype(&Context::archId), &Context::archId, conv_to_str<IdString>>::def_wrap(ctx_cls,
diff --git a/generic/examples/simple.py b/generic/examples/simple.py
index 17808fc7..b8ca3f78 100644
--- a/generic/examples/simple.py
+++ b/generic/examples/simple.py
@@ -1,16 +1,87 @@
+# Grid size including IOBs at edges
 X = 12
 Y = 12
+# SLICEs per tile
+Z = 8
+# LUT input count
+K = 4
+# Number of local wires
+L = Z*(K+1) + 8 
+# "Sparsity" of bel input wire pips
+Si = 4
+# "Sparsity" of Q to local wire pips
+Sq = 4
+# "Sparsity" of local to neighbour local wire pips
+Sl = 8
 
 def is_io(x, y):
 	return x == 0 or x == X-1 or y == 0 or y == Y-1
 
-
 for x in range(X):
 	for y in range(Y):
+		# Bel port wires
+		for z in range(Z):
+			ctx.addWire(name="X%dY%dZ%d_CLK" % (x, y, z), type="BEL_CLK", x=x, y=y)
+			ctx.addWire(name="X%dY%dZ%d_Q" % (x, y, z), type="BEL_Q", x=x, y=y)
+			for i in range(K):
+				ctx.addWire(name="X%dY%dZ%d_I%d" % (x, y, z, i), type="BEL_I", x=x, y=y)
+		# Local wires
+		for l in range(L):
+			ctx.addWire(name="X%dY%d_LOCAL%d" % (x, y, l), type="LOCAL", x=x, y=y)
+		# Create bels
 		if is_io(x, y):
 			if x == y:
 				continue
 			for z in range(2):
 				ctx.addBel(name="X%dY%d_IO%d" % (x, y, z), type="GENERIC_IOB", loc=Loc(x, y, z), gb=False)
+				ctx.addBelInput(bel="X%dY%d_IO%d" % (x, y, z), name="I", wire="X%dY%dZ%d_I0" % (x, y, z))
+				ctx.addBelInput(bel="X%dY%d_IO%d" % (x, y, z), name="EN", wire="X%dY%dZ%d_I1" % (x, y, z))
+				ctx.addBelOutput(bel="X%dY%d_IO%d" % (x, y, z), name="O", wire="X%dY%dZ%d_Q" % (x, y, z))
+
 		else:
-			ctx.addBel(name="X%dY%d_SLICE%d" % (x, y, z), type="GENERIC_SLICE", loc=Loc(x, y, z), gb=False)
+			for z in range(Z):
+				ctx.addBel(name="X%dY%d_SLICE%d" % (x, y, z), type="GENERIC_SLICE", loc=Loc(x, y, z), gb=False)
+				ctx.addBelInput(bel="X%dY%d_SLICE%d" % (x, y, z), name="CLK", wire="X%dY%dZ%d_CLK" % (x, y, z))
+				for k in range(K):
+					ctx.addBelInput(bel="X%dY%d_SLICE%d" % (x, y, z), name="I[%d]" % k, wire="X%dY%dZ%d_I%d" % (x, y, z, k))
+				ctx.addBelOutput(bel="X%dY%d_SLICE%d" % (x, y, z), name="Q", wire="X%dY%dZ%d_Q" % (x, y, z))
+
+for x in range(X):
+	for y in range(Y):
+		# Pips driving bel input wires
+		# Bel input wires are driven by every Si'th local with an offset
+		def create_input_pips(dst, offset, skip):
+			for i in range(offset % skip, L, skip):
+				src = "X%dY%d_LOCAL%d" % (x, y, i)
+				ctx.addPip(name="X%dY%d.%s.%s" % (x, y, src, dst), type="BEL_INPUT",
+					srcWire=src, dstWire=dst, delay=ctx.getDelayFromNS(0.05), loc=Loc(x, y, 0))
+		for z in range(Z):
+			create_input_pips("X%dY%dZ%d_CLK" % (x, y, z), 0, Si)
+			for k in range(K):
+				create_input_pips("X%dY%dZ%d_I%d" % (x, y, z, k), k % Si, Si)
+
+		# Pips from bel outputs to locals
+		def create_output_pips(dst, offset, skip):
+			for i in range(offset % skip, Z, skip):
+				src = "X%dY%dZ%d_Q" % (x, y, i)
+				ctx.addPip(name="X%dY%d.%s.%s" % (x, y, src, dst), type="BEL_OUTPUT",
+					srcWire=src, dstWire=dst, delay=ctx.getDelayFromNS(0.05), loc=Loc(x, y, 0))
+		# Pips from neighbour locals to locals
+		def create_neighbour_pips(dst, nx, ny, offset, skip):
+			if nx < 0 or nx >= X or ny < 0 or ny >= Y:
+				return
+			for i in range(offset % skip, L, skip):
+				src = "X%dY%d_LOCAL%d" % (nx, ny, i)
+				ctx.addPip(name="X%dY%d.%s.%s" % (x, y, src, dst), type="NEIGHBOUR",
+					srcWire=src, dstWire=dst, delay=ctx.getDelayFromNS(0.05), loc=Loc(x, y, 0))
+		for l in range(L):
+			dst = "X%dY%d_LOCAL%d" % (x, y, l)
+			create_output_pips(dst, l % Sq, Sq)
+			create_neighbour_pips(dst, x-1, y-1, (l + 1) % Sl, Sl)
+			create_neighbour_pips(dst, x-1, y, (l + 2) % Sl, Sl)
+			create_neighbour_pips(dst, x-1, y+1, (l + 2) % Sl, Sl)
+			create_neighbour_pips(dst, x, y-1, (l + 3) % Sl, Sl)
+			create_neighbour_pips(dst, x, y+1, (l + 4) % Sl, Sl)
+			create_neighbour_pips(dst, x+1, y-1, (l + 5) % Sl, Sl)
+			create_neighbour_pips(dst, x+1, y, (l + 6) % Sl, Sl)
+			create_neighbour_pips(dst, x+1, y+1, (l + 7) % Sl, Sl)
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