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author | YRabbit <rabbit@yrabbit.cyou> | 2022-04-03 10:05:27 +1000 |
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committer | YRabbit <rabbit@yrabbit.cyou> | 2022-04-03 10:05:27 +1000 |
commit | 85e8570a73dce11d3cfd2ce82a3b6c47214758af (patch) | |
tree | 60731058a0e1bdc1b1897696f24210d2512ad705 /gowin/pack.cc | |
parent | 2ed68a21db9d04e5688c4c0784b0817f3485926e (diff) | |
download | nextpnr-85e8570a73dce11d3cfd2ce82a3b6c47214758af.tar.gz nextpnr-85e8570a73dce11d3cfd2ce82a3b6c47214758af.tar.bz2 nextpnr-85e8570a73dce11d3cfd2ce82a3b6c47214758af.zip |
gowin: handle the GW1N-9 feature.
This chip has a different default state for one type of I/O buffer ---
you have to explicitly switch it to the normal state by feeding VCC/VSS
to certain inputs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'gowin/pack.cc')
-rw-r--r-- | gowin/pack.cc | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gowin/pack.cc b/gowin/pack.cc index 28370a75..4adfec1a 100644 --- a/gowin/pack.cc +++ b/gowin/pack.cc @@ -805,6 +805,14 @@ static void pack_iologic(Context *ctx) ci->addInput(id_XXX_VCC); ci->connectPort(id_XXX_VCC, ctx->nets[ctx->id("$PACKER_VCC_NET")].get()); } + if (ctx->gw1n9_quirk && iob_bel != q0_dst->attrs.end()) { + bool have_XXX_VSS0 = + ctx->bels[ctx->getBelByNameStr(iob_bel->second.as_string())].pins.count(id_XXX_VSS0); + if (have_XXX_VSS0) { + q0_dst->disconnectPort(id_XXX_VSS0); + q0_dst->connectPort(id_XXX_VSS0, ctx->nets[ctx->id("$PACKER_VCC_NET")].get()); + } + } } break; default: break; @@ -933,6 +941,7 @@ static void pack_io(Context *ctx) // what type to create IdString new_cell_type = id_IOB; std::string constr_bel_name = std::string(""); + bool have_xxx_port = false; // check whether the given IO is limited to simplified IO cells auto constr_bel = ci->attrs.find(id_BEL); if (constr_bel != ci->attrs.end()) { @@ -946,6 +955,9 @@ static void pack_io(Context *ctx) BelId constr_bel = ctx->getBelByNameStr(constr_bel_name); if (constr_bel != BelId()) { new_cell_type = ctx->bels[constr_bel].type; + if (ctx->gw1n9_quirk) { + have_xxx_port = ctx->bels[constr_bel].pins.count(id_XXX_VSS0) != 0; + } } } @@ -954,6 +966,13 @@ static void pack_io(Context *ctx) gwio_to_iob(ctx, ci, ice_cell.get(), packed_cells); new_cells.push_back(std::move(ice_cell)); auto gwiob = new_cells.back().get(); + // XXX GW1NR-9 quirks + if (have_xxx_port && ci->type != id_IBUF) { + gwiob->addInput(id_XXX_VSS0); + gwiob->connectPort(id_XXX_VSS0, ctx->nets[ctx->id("$PACKER_GND_NET")].get()); + gwiob->addInput(id_XXX_VSS1); + gwiob->connectPort(id_XXX_VSS1, ctx->nets[ctx->id("$PACKER_GND_NET")].get()); + } packed_cells.insert(ci->name); if (iob != nullptr) { |