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authorDavid Shah <davey1576@gmail.com>2018-11-29 19:46:05 +0000
committerGitHub <noreply@github.com>2018-11-29 19:46:05 +0000
commit58e9c6f32e7ab6a5f83245141f00c3955b91d905 (patch)
tree534505a2b1c3e8fddb773207c47da615ba865d7f /ice40/arch.cc
parentfc08856537aaa33e09642e55de0b9a95a53d3fd7 (diff)
parent8af367ad0ad7a2ea0bc11f4f20326dacfeb26d65 (diff)
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Merge pull request #158 from YosysHQ/improve_error
Error reporting improvements
Diffstat (limited to 'ice40/arch.cc')
-rw-r--r--ice40/arch.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 02e5515b..ddf25270 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -951,7 +951,7 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in
return TMG_IGNORE;
return TMG_ENDPOINT;
}
- log_error("no timing info for port '%s' of cell type '%s'\n", port.c_str(this), cell->type.c_str(this));
+ log_error("cell type '%s' is unsupported (instantiated as '%s')\n", cell->type.c_str(this), cell->name.c_str(this));
}
TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port, int index) const