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authorDavid Shah <davey1576@gmail.com>2018-06-20 11:44:28 +0200
committerDavid Shah <davey1576@gmail.com>2018-06-20 11:44:28 +0200
commit1436ae21a2d9a214f7585deb2f038ff87ce4862c (patch)
tree910e696f210ea31a7f15e70455c08d895c7e7887 /ice40/arch.h
parent5d1b87b0a4e138726d751590728cdcc2f12f6192 (diff)
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Adding stubs for delay annotation and cell timing lookup
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/arch.h')
-rw-r--r--ice40/arch.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/ice40/arch.h b/ice40/arch.h
index c1256a41..172541c0 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -755,6 +755,16 @@ struct Arch : BaseCtx
std::unordered_set<BelId> belGraphicsReload;
std::unordered_set<WireId> wireGraphicsReload;
std::unordered_set<PipId> pipGraphicsReload;
+
+ // -------------------------------------------------
+
+ // Get the delay through a cell from one port to another
+ delay_t getCellDelay(const CellInfo *cell, IdString fromPort,
+ IdString toPort) const;
+ // Get the associated clock to a port, or empty if the port is combinational
+ IdString getPortClock(const CellInfo *cell, IdString port) const;
+ // Return true if a port is a clock
+ bool isClockPort(const CellInfo *cell, IdString port) const;
};
NEXTPNR_NAMESPACE_END