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| author | Sergiusz Bazanski <q3k@q3k.org> | 2018-07-25 11:32:21 +0100 |
|---|---|---|
| committer | Sergiusz Bazanski <q3k@q3k.org> | 2018-07-25 11:32:21 +0100 |
| commit | aad0d3eb3587b0c09ea89731e5387cd70338b375 (patch) | |
| tree | 44f4270b4e1dffc62dd2f7b30082ddfbee91470a /ice40/arch_place.cc | |
| parent | 62bcda87bdd6a847b4ff27e59cf122caa7efba11 (diff) | |
| download | nextpnr-aad0d3eb3587b0c09ea89731e5387cd70338b375.tar.gz nextpnr-aad0d3eb3587b0c09ea89731e5387cd70338b375.tar.bz2 nextpnr-aad0d3eb3587b0c09ea89731e5387cd70338b375.zip | |
ice40: support PLL40_*_PAD, fix pass-through LUT for LOCK
Diffstat (limited to 'ice40/arch_place.cc')
| -rw-r--r-- | ice40/arch_place.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc index 59e1807d..fdd537a7 100644 --- a/ice40/arch_place.cc +++ b/ice40/arch_place.cc @@ -130,6 +130,10 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const auto pll_cell = getBoundBelCell(pll_bel); auto pi = cells.at(pll_cell)->ports[portPinToId(pll_bel_pin)]; if (pi.net != nullptr) { + // Are we perhaps a PAD INPUT Bel that can be placed here? + if (cells.at(pll_cell)->attrs[id("BEL_PAD_INPUT")] == getBelName(bel).str(this)) { + return true; + } return false; } } |