aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/bitstream.cc
diff options
context:
space:
mode:
authorDavid Shah <davey1576@gmail.com>2018-06-23 11:25:32 +0200
committerDavid Shah <davey1576@gmail.com>2018-06-23 11:25:32 +0200
commit2e6916ecabeb9b4e4df23e68378a0c4fc608c6ec (patch)
treec919714780bf5ee032273c23e671f79fa63f3d53 /ice40/bitstream.cc
parentcb92c10b9919b53505d1805773935bb6c1679b7c (diff)
downloadnextpnr-2e6916ecabeb9b4e4df23e68378a0c4fc608c6ec.tar.gz
nextpnr-2e6916ecabeb9b4e4df23e68378a0c4fc608c6ec.tar.bz2
nextpnr-2e6916ecabeb9b4e4df23e68378a0c4fc608c6ec.zip
ice40: Fix UltraPlus quasi-logic-cell bits
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/bitstream.cc')
-rw-r--r--ice40/bitstream.cc54
1 files changed, 29 insertions, 25 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc
index 61bbe27d..c46776a6 100644
--- a/ice40/bitstream.cc
+++ b/ice40/bitstream.cc
@@ -348,30 +348,34 @@ void write_asc(const Context *ctx, std::ostream &out)
// Weird UltraPlus bits
if (tile == TILE_DSP0 || tile == TILE_DSP1 || tile == TILE_DSP2 ||
- tile == TILE_IPCON) {
- for (int lc_idx = 0; lc_idx < 8; lc_idx++) {
- static const std::vector<int> ip_dsp_lut_perm = {
- 4, 14, 15, 5, 6, 16, 17, 7,
- 3, 13, 12, 2, 1, 11, 10, 0,
- };
- for (int i = 0; i < 16; i++)
- set_config(ti, config.at(y).at(x),
- "LC_" + std::to_string(lc_idx),
- ((i % 8) >= 4), ip_dsp_lut_perm.at(i));
- if (tile == TILE_IPCON)
- set_config(ti, config.at(y).at(x),
- "Cascade.IPCON_LC0" +
- std::to_string(lc_idx) +
- "_inmux02_5",
- true);
- else
- set_config(
- ti, config.at(y).at(x),
- "Cascade.MULT" +
- std::to_string(int(tile - TILE_DSP0)) +
- "_LC0" + std::to_string(lc_idx) +
- "_inmux02_5",
- true);
+ tile == TILE_DSP3 || tile == TILE_IPCON) {
+ if (ctx->args.type == ArchArgs::UP5K && x == 25 && y == 14) {
+ // Mystery bits not set in this one tile
+ } else {
+ for (int lc_idx = 0; lc_idx < 8; lc_idx++) {
+ static const std::vector<int> ip_dsp_lut_perm = {
+ 4, 14, 15, 5, 6, 16, 17, 7,
+ 3, 13, 12, 2, 1, 11, 10, 0,
+ };
+ for (int i = 0; i < 16; i++)
+ set_config(ti, config.at(y).at(x),
+ "LC_" + std::to_string(lc_idx),
+ ((i % 8) >= 4), ip_dsp_lut_perm.at(i));
+ if (tile == TILE_IPCON)
+ set_config(ti, config.at(y).at(x),
+ "Cascade.IPCON_LC0" +
+ std::to_string(lc_idx) +
+ "_inmux02_5",
+ true);
+ else
+ set_config(ti, config.at(y).at(x),
+ "Cascade.MULT" +
+ std::to_string(
+ int(tile - TILE_DSP0)) +
+ "_LC0" + std::to_string(lc_idx) +
+ "_inmux02_5",
+ true);
+ }
}
}
}
@@ -458,7 +462,7 @@ void write_asc(const Context *ctx, std::ostream &out)
}
// Write symbols
- //const bool write_symbols = 1;
+ // const bool write_symbols = 1;
for (auto wire : ctx->getWires()) {
IdString net = ctx->getWireNet(wire, false);
if (net != IdString())