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| author | Sylvain Munaut <tnt@246tNt.com> | 2018-11-17 18:02:31 +0100 |
|---|---|---|
| committer | Sylvain Munaut <tnt@246tNt.com> | 2018-11-19 18:20:20 +0100 |
| commit | e8556aff372c77c1e14a4378b43b47f8ba1e75ec (patch) | |
| tree | 40d8a30b0d1d30bf84df1fd47b0c8d38e594b7f2 /ice40/bitstream.cc | |
| parent | de8de6304f6905525fd5774d30851c0cc9fe4e37 (diff) | |
| download | nextpnr-e8556aff372c77c1e14a4378b43b47f8ba1e75ec.tar.gz nextpnr-e8556aff372c77c1e14a4378b43b47f8ba1e75ec.tar.bz2 nextpnr-e8556aff372c77c1e14a4378b43b47f8ba1e75ec.zip | |
ice40: Add support for SB_RGBA_DRV
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'ice40/bitstream.cc')
| -rw-r--r-- | ice40/bitstream.cc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 44d385e4..ecb26753 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -586,6 +586,11 @@ void write_asc(const Context *ctx, std::ostream &out) set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_1", write_mode & 0x2); set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_2", read_mode & 0x1); set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_3", read_mode & 0x2); + } else if (cell.second->type == ctx->id("SB_RGBA_DRV")) { + const std::vector<std::pair<std::string, int>> rgba_params = { + {"CURRENT_MODE", 1}, {"RGB0_CURRENT", 6}, {"RGB1_CURRENT", 6}, {"RGB2_CURRENT", 6}}; + configure_extra_cell(config, ctx, cell.second.get(), rgba_params, true, std::string("IpConfig.")); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "RGBA_DRV_EN", true, "IpConfig."); } else if (cell.second->type == ctx->id("SB_WARMBOOT") || cell.second->type == ctx->id("ICESTORM_LFOSC")) { // No config needed } else if (cell.second->type == ctx->id("ICESTORM_SPRAM")) { |