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| author | Miodrag Milanovic <mmicko@gmail.com> | 2019-06-25 18:14:51 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-06-25 18:14:51 +0200 |
| commit | ec47ce2320fdc9d698e71c07af0844f7ecc2445c (patch) | |
| tree | b7a3b232daed5ef0ff7521dc6b5765613c37206b /ice40/bitstream.cc | |
| parent | 9affcf82d969bf34aae449a28391451a4f4fdfd8 (diff) | |
| parent | 76ff7919132a58971b197a40e7fba119f0b021f5 (diff) | |
| download | nextpnr-ec47ce2320fdc9d698e71c07af0844f7ecc2445c.tar.gz nextpnr-ec47ce2320fdc9d698e71c07af0844f7ecc2445c.tar.bz2 nextpnr-ec47ce2320fdc9d698e71c07af0844f7ecc2445c.zip | |
Merge master
Diffstat (limited to 'ice40/bitstream.cc')
| -rw-r--r-- | ice40/bitstream.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 9b85dff5..7632b443 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -610,6 +610,14 @@ void write_asc(const Context *ctx, std::ostream &out) set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_1", write_mode & 0x2); set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_2", read_mode & 0x1); set_config(ti_ramt, config.at(y + 1).at(x), "RamConfig.CBIT_3", read_mode & 0x2); + } else if (cell.second->type == ctx->id("SB_LED_DRV_CUR")) { + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "LED_DRV_CUR_EN", true, + "IpConfig."); + } else if (cell.second->type == ctx->id("SB_RGB_DRV")) { + const std::vector<std::pair<std::string, int>> rgb_params = { + {"RGB0_CURRENT", 6}, {"RGB1_CURRENT", 6}, {"RGB2_CURRENT", 6}}; + configure_extra_cell(config, ctx, cell.second.get(), rgb_params, true, std::string("IpConfig.")); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "RGB_DRV_EN", true, "IpConfig."); } else if (cell.second->type == ctx->id("SB_RGBA_DRV")) { const std::vector<std::pair<std::string, int>> rgba_params = { {"CURRENT_MODE", 1}, {"RGB0_CURRENT", 6}, {"RGB1_CURRENT", 6}, {"RGB2_CURRENT", 6}}; |