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authorClifford Wolf <clifford@clifford.at>2018-06-13 17:19:36 +0200
committerClifford Wolf <clifford@clifford.at>2018-06-13 17:19:36 +0200
commit33863fee2d3e7e565680cfbca30a6220118b8296 (patch)
treebc52da4b6fa0c24e5f22e539ef7a9116ba936c07 /ice40/chipdb.py
parent821fb3a55dc0954d75ade4c8ca50afae62c04956 (diff)
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Add missing iCE40 global buffer bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40/chipdb.py')
-rw-r--r--ice40/chipdb.py18
1 files changed, 18 insertions, 0 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 406b35ec..555a4235 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -324,6 +324,24 @@ elif dev_name == "5k":
add_bel_gb(12, 0, 5)
add_bel_gb( 6, 0, 6)
add_bel_gb(19, 0, 7)
+elif dev_name == "8k":
+ add_bel_gb(33, 16, 7)
+ add_bel_gb( 0, 16, 6)
+ add_bel_gb(17, 33, 1)
+ add_bel_gb(17, 0, 0)
+ add_bel_gb( 0, 17, 3)
+ add_bel_gb(33, 17, 2)
+ add_bel_gb(16, 0, 5)
+ add_bel_gb(16, 33, 4)
+elif dev_name == "384":
+ add_bel_gb( 7, 4, 7)
+ add_bel_gb( 0, 4, 6)
+ add_bel_gb( 4, 9, 1)
+ add_bel_gb( 4, 0, 0)
+ add_bel_gb( 0, 5, 3)
+ add_bel_gb( 7, 5, 2)
+ add_bel_gb( 3, 0, 5)
+ add_bel_gb( 3, 9, 4)
print('#include "nextpnr.h"')
print('namespace {')