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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2018-07-27 19:52:45 -0700 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2018-07-27 19:52:45 -0700 |
| commit | 02b3bda7f6ecec2e6896e46b03938871c236a52d (patch) | |
| tree | 2d1738c520911a6d712c02d466e025adda2f8c45 /ice40 | |
| parent | 4c40541484f0f0b571e1c7e4604c39c74dd5c93d (diff) | |
| download | nextpnr-02b3bda7f6ecec2e6896e46b03938871c236a52d.tar.gz nextpnr-02b3bda7f6ecec2e6896e46b03938871c236a52d.tar.bz2 nextpnr-02b3bda7f6ecec2e6896e46b03938871c236a52d.zip | |
ice40 estimateDelay to account for out/in muxes
Diffstat (limited to 'ice40')
| -rw-r--r-- | ice40/arch.cc | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index 4e9baf7e..cfafa2d8 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -584,6 +584,22 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const // offset = 500; // } + // Estimate for output mux + for (const auto& bp : getWireBelPins(src)) { + if (bp.pin == PIN_O && getBelType(bp.bel) == TYPE_ICESTORM_LC) { + offset += 330; + break; + } + } + + // Estimate for input mux + for (const auto& bp : getWireBelPins(dst)) { + if ((bp.pin == PIN_I0 || bp.pin == PIN_I1 || bp.pin == PIN_I2 || bp.pin == PIN_I3) && getBelType(bp.bel) == TYPE_ICESTORM_LC) { + offset += 260; + break; + } + } + return xscale * abs(xd) + yscale * abs(yd) + offset; } |