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authorSergiusz Bazanski <q3k@q3k.org>2018-07-25 11:57:10 +0100
committerSergiusz Bazanski <q3k@q3k.org>2018-07-25 12:01:51 +0100
commit2c34a50a7c45d3718629ada8691816497447afe4 (patch)
treeaddeb0d07b00e7206c0a9bc3810025f199919f85 /ice40
parentdb4f2d23180e9c62600e5e6cd744d9eb273a112e (diff)
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ice40: after review
Diffstat (limited to 'ice40')
-rw-r--r--ice40/arch.h2
-rw-r--r--ice40/arch_place.cc4
2 files changed, 3 insertions, 3 deletions
diff --git a/ice40/arch.h b/ice40/arch.h
index 5905b115..bd937371 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -749,7 +749,7 @@ struct Arch : BaseCtx
return src_bel;
}
}
- NPNR_ASSERT(0);
+ NPNR_ASSERT_FALSE("Expected PLL pin to share an output with an SB_IO D_IN_{0,1}");
}
};
diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc
index fdd537a7..b3404d6c 100644
--- a/ice40/arch_place.cc
+++ b/ice40/arch_place.cc
@@ -124,10 +124,10 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
}
// Is there a PLL that shares this IO buffer?
if (pll_bel.index != -1) {
+ auto pll_cell = getBoundBelCell(pll_bel);
// Is a PLL placed in this PLL bel?
- if (!checkBelAvail(pll_bel)) {
+ if (pll_cell != IdString()) {
// Is the shared port driving a net?
- auto pll_cell = getBoundBelCell(pll_bel);
auto pi = cells.at(pll_cell)->ports[portPinToId(pll_bel_pin)];
if (pi.net != nullptr) {
// Are we perhaps a PAD INPUT Bel that can be placed here?