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authorDavid Shah <davey1576@gmail.com>2019-02-09 19:31:51 +0000
committerGitHub <noreply@github.com>2019-02-09 19:31:51 +0000
commit4a2560b0d385736783ff1f75ea9602bfee6078bf (patch)
tree028d9a81e13afc63e00d4c1343c167c9b61f620e /ice40
parenta520b38424531e83ef47d2c37aab17a2bc764765 (diff)
parent054be887aeb7cc4dee1c7191adeff87fda3f1fb3 (diff)
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Merge pull request #232 from YosysHQ/err145
ice40: PLLs can't conflict with themselves
Diffstat (limited to 'ice40')
-rw-r--r--ice40/pack.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/ice40/pack.cc b/ice40/pack.cc
index 6b3ddefc..c22c4e8c 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -770,6 +770,8 @@ static void place_plls(Context *ctx)
io_cell->name.c_str(ctx));
if (pll_used_bels.count(found_bel)) {
CellInfo *conflict_cell = pll_used_bels.at(found_bel);
+ if (conflict_cell == ci)
+ continue;
log_error("PLL '%s' PACKAGEPIN forces it to BEL %s but BEL is already assigned to PLL '%s'\n",
ci->name.c_str(ctx), ctx->getBelName(found_bel).c_str(ctx), conflict_cell->name.c_str(ctx));
}