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authorgatecat <gatecat@ds0.me>2022-01-16 19:59:56 +0000
committerGitHub <noreply@github.com>2022-01-16 19:59:56 +0000
commit58a1b473b85ae8bc4312eed14af1829b93958341 (patch)
tree9dbefa931b0f102744fb538f91865ba949cad9be /ice40
parent2ab08a872d08e6ba64a0b81303889a14941a88f0 (diff)
parenta946ed0206cda29ce1bfe7f5a09f1b5e3d21794d (diff)
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Merge pull request #873 from YosysHQ/gatecat/ice40-carry-lut
ice40: Pack LUT at start of carry chain if there is 1 candidate
Diffstat (limited to 'ice40')
-rw-r--r--ice40/pack.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/ice40/pack.cc b/ice40/pack.cc
index 0db78992..921e73e0 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -203,6 +203,8 @@ static void pack_carries(Context *ctx)
CellInfo *carry_lc = nullptr;
if (carry_ci_lc && carry_lcs.find(carry_ci_lc->name) != carry_lcs.end()) {
carry_lc = carry_ci_lc;
+ } else if (ci_const && carry_lcs.size() == 1) {
+ carry_lc = ctx->cells.at(*(carry_lcs.begin())).get();
} else {
// No LC to pack into matching I0/I1, insert a new one
std::unique_ptr<CellInfo> created_lc =