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| author | Clifford Wolf <cliffordvienna@gmail.com> | 2018-07-21 19:45:24 +0000 |
|---|---|---|
| committer | Clifford Wolf <cliffordvienna@gmail.com> | 2018-07-21 19:45:24 +0000 |
| commit | 9e6deed3b839a2df92644f71bc6cbc1be4ea0480 (patch) | |
| tree | e6b16c9c91f0c1521d609e238e94356e42cbdb4e /ice40 | |
| parent | 30e2f0e1e8cfdb24abe6c3a8013691497c706975 (diff) | |
| parent | 6588aafdb8038625e8ce0cc265a2851cbb16b1c9 (diff) | |
| download | nextpnr-9e6deed3b839a2df92644f71bc6cbc1be4ea0480.tar.gz nextpnr-9e6deed3b839a2df92644f71bc6cbc1be4ea0480.tar.bz2 nextpnr-9e6deed3b839a2df92644f71bc6cbc1be4ea0480.zip | |
Merge branch 'q3k/lock-2-electric-boogaloo' into 'master'
Basic locking and threading for Arch/GUI
See merge request SymbioticEDA/nextpnr!10
Diffstat (limited to 'ice40')
| -rw-r--r-- | ice40/arch.cc | 8 | ||||
| -rw-r--r-- | ice40/arch.h | 8 |
2 files changed, 12 insertions, 4 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index bbed4000..5d7d1fb4 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -19,13 +19,13 @@ #include <algorithm> #include <cmath> +#include "cells.h" #include "gfx.h" #include "log.h" #include "nextpnr.h" #include "placer1.h" #include "router1.h" #include "util.h" -#include "cells.h" NEXTPNR_NAMESPACE_BEGIN // ----------------------------------------------------------------------- @@ -520,9 +520,9 @@ DecalXY Arch::getWireDecal(WireId wire) const DecalXY Arch::getPipDecal(PipId pip) const { DecalXY decalxy; - // decalxy.decal.type = DecalId::TYPE_PIP; - // decalxy.decal.index = pip.index; - // decalxy.decal.active = pip_to_net.at(pip.index) != IdString(); + decalxy.decal.type = DecalId::TYPE_PIP; + decalxy.decal.index = pip.index; + decalxy.decal.active = pip_to_net.at(pip.index) != IdString(); return decalxy; }; diff --git a/ice40/arch.h b/ice40/arch.h index 21169298..b7e66414 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -390,6 +390,7 @@ struct Arch : BaseCtx bel_to_cell[bel.index] = cell; cells[cell]->bel = bel; cells[cell]->belStrength = strength; + refreshUiBel(bel); } void unbindBel(BelId bel) @@ -399,6 +400,7 @@ struct Arch : BaseCtx cells[bel_to_cell[bel.index]]->bel = BelId(); cells[bel_to_cell[bel.index]]->belStrength = STRENGTH_NONE; bel_to_cell[bel.index] = IdString(); + refreshUiBel(bel); } bool checkBelAvail(BelId bel) const @@ -509,6 +511,7 @@ struct Arch : BaseCtx wire_to_net[wire.index] = net; nets[net]->wires[wire].pip = PipId(); nets[net]->wires[wire].strength = strength; + refreshUiWire(wire); } void unbindWire(WireId wire) @@ -528,6 +531,7 @@ struct Arch : BaseCtx net_wires.erase(it); wire_to_net[wire.index] = IdString(); + refreshUiWire(wire); } bool checkWireAvail(WireId wire) const @@ -581,6 +585,8 @@ struct Arch : BaseCtx wire_to_net[dst.index] = net; nets[net]->wires[dst].pip = pip; nets[net]->wires[dst].strength = strength; + refreshUiPip(pip); + refreshUiWire(dst); } void unbindPip(PipId pip) @@ -597,6 +603,8 @@ struct Arch : BaseCtx pip_to_net[pip.index] = IdString(); switches_locked[chip_info->pip_data[pip.index].switch_index] = IdString(); + refreshUiPip(pip); + refreshUiWire(dst); } bool checkPipAvail(PipId pip) const |