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author | Eddie Hung <eddieh@ece.ubc.ca> | 2018-07-28 14:11:43 -0700 |
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committer | Eddie Hung <eddieh@ece.ubc.ca> | 2018-07-28 14:11:43 -0700 |
commit | beabb429b0be91c597cb2a9f7726a159a6f40b32 (patch) | |
tree | ac314ed94a819bf91dffc3f005e04d6cbf137cb4 /ice40 | |
parent | de6d0d20d7d8e4d79fe1f96bc44945326c230fc4 (diff) | |
download | nextpnr-beabb429b0be91c597cb2a9f7726a159a6f40b32.tar.gz nextpnr-beabb429b0be91c597cb2a9f7726a159a6f40b32.tar.bz2 nextpnr-beabb429b0be91c597cb2a9f7726a159a6f40b32.zip |
clangformat
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/arch.cc | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index cfafa2d8..2ca8b665 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -585,7 +585,7 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const // } // Estimate for output mux - for (const auto& bp : getWireBelPins(src)) { + for (const auto &bp : getWireBelPins(src)) { if (bp.pin == PIN_O && getBelType(bp.bel) == TYPE_ICESTORM_LC) { offset += 330; break; @@ -593,8 +593,9 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const } // Estimate for input mux - for (const auto& bp : getWireBelPins(dst)) { - if ((bp.pin == PIN_I0 || bp.pin == PIN_I1 || bp.pin == PIN_I2 || bp.pin == PIN_I3) && getBelType(bp.bel) == TYPE_ICESTORM_LC) { + for (const auto &bp : getWireBelPins(dst)) { + if ((bp.pin == PIN_I0 || bp.pin == PIN_I1 || bp.pin == PIN_I2 || bp.pin == PIN_I3) && + getBelType(bp.bel) == TYPE_ICESTORM_LC) { offset += 260; break; } @@ -605,9 +606,9 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const delay_t Arch::getBudgetOverride(NetInfo *net_info, int user_idx, delay_t budget) const { - const auto& driver = net_info->driver; + const auto &driver = net_info->driver; if (driver.port == id_cout) { - const auto& sink = net_info->users[user_idx]; + const auto &sink = net_info->users[user_idx]; auto driver_loc = getBelLocation(driver.cell->bel); auto sink_loc = getBelLocation(sink.cell->bel); if (driver_loc.y == sink_loc.y) |