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authorZipCPU <dgisselq@ieee.org>2018-06-07 09:38:14 -0400
committerZipCPU <dgisselq@ieee.org>2018-06-07 09:38:14 -0400
commitf32b9622d5c61610f6027f6544ab9683cd57282b (patch)
treedf3bb9add472148dcf4d4556eafae5431bb0f66c /ice40
parent0dbfa4662f74b89c5f3f8c4fa5ebbef6a89d532b (diff)
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Initial (random) placer capability
This commit also includes changes to jsonparse to allow it to 1) recognize ports with no connection, and set their net pointers to NULL 2) recognize designs with a ports node rather than a ports_direction The rule checker has also been modified to accommodate possible NULL netlists The ice40 chip now also has iterator operations ++bi and bi++.
Diffstat (limited to 'ice40')
-rw-r--r--ice40/chip.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/ice40/chip.h b/ice40/chip.h
index 695eea48..dd00c7c8 100644
--- a/ice40/chip.h
+++ b/ice40/chip.h
@@ -276,12 +276,23 @@ struct BelIterator
{
int cursor;
- void operator++() { cursor++; }
+ BelIterator operator++() { cursor++; return *this; }
+ BelIterator operator++(int) {
+ BelIterator prior(*this);
+ cursor++;
+ return prior;
+ }
+
bool operator!=(const BelIterator &other) const
{
return cursor != other.cursor;
}
+ bool operator==(const BelIterator &other) const
+ {
+ return cursor == other.cursor;
+ }
+
BelId operator*() const
{
BelId ret;