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| author | William D. Jones <thor0505@comcast.net> | 2021-01-31 19:05:36 -0500 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-02-12 10:36:59 +0000 |
| commit | 2c9d4ba9ae8123e6aea2a690ec03b052ea7a53af (patch) | |
| tree | 180dad5a4c3b64f345bcd09975ea021f1e575bb5 /machxo2/cells.cc | |
| parent | 0d00c10e2f3dfdc188f598e17c8aa89a9c502f55 (diff) | |
| download | nextpnr-2c9d4ba9ae8123e6aea2a690ec03b052ea7a53af.tar.gz nextpnr-2c9d4ba9ae8123e6aea2a690ec03b052ea7a53af.tar.bz2 nextpnr-2c9d4ba9ae8123e6aea2a690ec03b052ea7a53af.zip | |
machxo2: Fix reversed interpretation of REG_SD config bits.
Diffstat (limited to 'machxo2/cells.cc')
| -rw-r--r-- | machxo2/cells.cc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/machxo2/cells.cc b/machxo2/cells.cc index 6b6aeda2..dd673c38 100644 --- a/machxo2/cells.cc +++ b/machxo2/cells.cc @@ -157,12 +157,6 @@ void lut_to_lc(const Context *ctx, CellInfo *lut, CellInfo *lc, bool no_dff) void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut) { - // By this point, we have shown that LUT4 Z is attached to FACADE_FF DI. - // This connection will be preserved by port replacement, but the SD mux - // which selects the actual DFF input needs to be told to use the - // FACADE_SLICE DI input instead of the FACADE_SLICE M input. - lc->params[ctx->id("REG0_SD")] = std::string("0"); - // FIXME: This will have to change once we support FFs with reset value of 1. lc->params[ctx->id("REG0_REGSET")] = std::string("RESET"); |