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author | William D. Jones <thor0505@comcast.net> | 2021-02-07 22:06:23 -0500 |
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committer | gatecat <gatecat@ds0.me> | 2021-02-12 10:36:59 +0000 |
commit | 4948e8d914ec5d77777d197d7b2138cba933d33e (patch) | |
tree | 8051c80e5dbb7725fc37d3de2c6ce56c7b4ae61c /machxo2/cells.cc | |
parent | 086bca18b828488cab4f2a825cffa34812ab8c8f (diff) | |
download | nextpnr-4948e8d914ec5d77777d197d7b2138cba933d33e.tar.gz nextpnr-4948e8d914ec5d77777d197d7b2138cba933d33e.tar.bz2 nextpnr-4948e8d914ec5d77777d197d7b2138cba933d33e.zip |
machxo2: Fix packing when FF is driven by a constant; UART test core working on silicon, fails post-synth sim.
Diffstat (limited to 'machxo2/cells.cc')
-rw-r--r-- | machxo2/cells.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/machxo2/cells.cc b/machxo2/cells.cc index 7d15b1af..5dea36e2 100644 --- a/machxo2/cells.cc +++ b/machxo2/cells.cc @@ -166,7 +166,7 @@ void dff_to_lc(Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut) // If a register's DI port is fed by a constant, options for placing are // limited. Use the LUT to get around this. if(pass_thru_lut) { - lc->params[ctx->id("LUT0_INITVAL")] = 0xAAAA; + lc->params[ctx->id("LUT0_INITVAL")] = Property(0xAAAA, 16);; replace_port(dff, ctx->id("DI"), lc, ctx->id("A0")); connect_ports(ctx, lc, ctx->id("F0"), lc, ctx->id("DI0")); } else { |