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author | gatecat <gatecat@ds0.me> | 2021-07-28 12:42:58 +0100 |
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committer | gatecat <gatecat@ds0.me> | 2021-07-28 12:42:58 +0100 |
commit | d0acb1b2391fb33f0888778a4c644058076343ee (patch) | |
tree | d2a10f66fad3f299e7051049e7ce58f68407760f /nexus/arch.h | |
parent | 14c676ab494e5a412fde9f6c303317df1d7e1b80 (diff) | |
download | nextpnr-d0acb1b2391fb33f0888778a4c644058076343ee.tar.gz nextpnr-d0acb1b2391fb33f0888778a4c644058076343ee.tar.bz2 nextpnr-d0acb1b2391fb33f0888778a4c644058076343ee.zip |
nexus: Add IOLOGIC pins data
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'nexus/arch.h')
-rw-r--r-- | nexus/arch.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/nexus/arch.h b/nexus/arch.h index 8c330e47..4d2649fd 100644 --- a/nexus/arch.h +++ b/nexus/arch.h @@ -809,8 +809,9 @@ enum CellPinStyle PINSTYLE_INV_PD_CIB = 0x4017, // invertible, pull down by default PINSTYLE_INV_PU = 0x4027, // invertible, pull up by default - PINSTYLE_IOL_CE = 0x2027, // CE type signal, with explicit 'const-1' config bit - PINSTYLE_GATE = 0x1011, // gated signal that defaults to 0 + PINSTYLE_IOL_CELSR = 0x3007, // CE type signal, with explicit 'const-1' config bit + PINSTYLE_IOL_CLK = 0x3107, // CE type signal, with explicit 'const-1' config bit + PINSTYLE_GATE = 0x1011, // gated signal that defaults to 0 }; // This represents the mux options for a pin |